2011 Proceedings of the ESSCIRC (ESSCIRC)
Latest Publications

TOTAL DOCUMENTS

135

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Published By IEEE

9781457707032

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

An analog readout circuit with offset calibration for cantiliver-based DNA detection

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044972 ◽

2011 ◽

Cited By ~ 6

Author(s):

F. Borghetti ◽

N. Massari ◽

D. Stoppa ◽

A. Adami ◽

L. Lorenzelli ◽

...

Keyword(s):

Dna Detection ◽

Readout Circuit

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A 2.56 Gb/s soft RS (255,239) decoder chip for optical communication systems

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044919 ◽

2011 ◽

Cited By ~ 3

Author(s):

Chih-Hsiang Hsu ◽

Yi-Min Lin ◽

Hsie-Chia Chang ◽

Chen-Yi Lee

Keyword(s):

Optical Communication ◽

Communication Systems ◽

Optical Communication Systems

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55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044987 ◽

2011 ◽

Cited By ~ 1

Author(s):

Tzu-Chi Huang ◽

Wen-Shen Chou ◽

Yu-Huei Lee ◽

Yao-Yi Yang ◽

Ke-Horng Chen ◽

...

Keyword(s):

Voltage Scaling ◽

Dynamic Voltage Scaling ◽

Digital To Analog Converter ◽

Analog Converter ◽

Dynamic Voltage ◽

Digital To Analog

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A tunable transconductor for analog amplification and filtering based on double-gate organic TFTs

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044995 ◽

2011 ◽

Cited By ~ 11

Author(s):

D. Raiteri ◽

F. Torricelli ◽

E. Cantatore ◽

A. H. M. van Roermund

Keyword(s):

Double Gate

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A 3.6mW @ 1.2V high linear 8th-order CMOS complex filter for IEEE 802.15.4 standard

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044924 ◽

2011 ◽

Cited By ~ 2

Author(s):

Alberto Villegas ◽

Diego Vazquez ◽

Eduardo Peralias ◽

Adoracion Rueda

Keyword(s):

Ieee 802.15.4 ◽

Complex Filter ◽

Ieee 802.15.4 Standard

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A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044899 ◽

2011 ◽

Cited By ~ 6

Author(s):

Yuji Osaki ◽

Tetsuya Hirose ◽

Nobutaka Kuroki ◽

Masahiro Numa

Keyword(s):

Error Correction ◽

Low Voltage ◽

Digital Cmos ◽

Level Shifter

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Merged two-stage power converter with soft charging switched-capacitor stage in 180 nm CMOS

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6045011 ◽

2011 ◽

Cited By ~ 6

Author(s):

Robert C. N. Pilawa-Podgurski ◽

David J. Perreault

Keyword(s):

Power Converter ◽

Switched Capacitor ◽

Two Stage

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A 3.3V 500mA digital Buck-Boost converter with 92% peak efficiency using constant ON/OFF time delta-sigma fractional-N control

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6045001 ◽

2011 ◽

Cited By ~ 1

Author(s):

Qadeer Khan ◽

Sachin Rao ◽

Damian Swank ◽

Arun Rao ◽

William McIntyre ◽

...

Keyword(s):

Boost Converter ◽

Peak Efficiency ◽

Delta Sigma ◽

Off Time

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A 0.47–1.6mW 5bit 0.5–1GS/s time-interleaved SAR ADC for low-power UWB radios

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044886 ◽

2011 ◽

Cited By ~ 8

Author(s):

Pieter Harpe ◽

Ben Busze ◽

Kathleen Philips ◽

Harmke de Groot

Keyword(s):

Low Power ◽

Sar Adc ◽

Time Interleaved

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A 3.4W digital-in class-D audio amplifier

2011 Proceedings of the ESSCIRC (ESSCIRC) ◽

10.1109/esscirc.2011.6044921 ◽

2011 ◽

Cited By ~ 1

Author(s):

Marco Berkhout ◽

Lutsen Dooper

Keyword(s):

Audio Amplifier ◽

Class D

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2011 Proceedings of the ESSCIRC (ESSCIRC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

An analog readout circuit with offset calibration for cantiliver-based DNA detection

A 2.56 Gb/s soft RS (255,239) decoder chip for optical communication systems

55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter

A tunable transconductor for analog amplification and filtering based on double-gate organic TFTs

A 3.6mW @ 1.2V high linear 8th-order CMOS complex filter for IEEE 802.15.4 standard

A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs

Merged two-stage power converter with soft charging switched-capacitor stage in 180 nm CMOS

A 3.3V 500mA digital Buck-Boost converter with 92% peak efficiency using constant ON/OFF time delta-sigma fractional-N control

A 0.47–1.6mW 5bit 0.5–1GS/s time-interleaved SAR ADC for low-power UWB radios

A 3.4W digital-in class-D audio amplifier

2011 Proceedings of the ESSCIRC (ESSCIRC)
Latest Publications