35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings.
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Published By IEEE Comput. Soc

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Compiling for instruction cache performance on a multithreaded architecture

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176269 ◽

2005 ◽

Cited By ~ 6

Author(s):

R. Kumar ◽

D.M. Tullsen

Keyword(s):

Cache Performance ◽

Instruction Cache ◽

Multithreaded Architecture

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Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176244 ◽

2003 ◽

Cited By ~ 6

Author(s):

E. Gibert ◽

J. Sanchez ◽

A. Gonzalez

Keyword(s):

Effective Instruction ◽

Instruction Scheduling ◽

Vliw Processor

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Managing static leakage energy in microprocessor functional units

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176260 ◽

2003 ◽

Cited By ~ 26

Author(s):

S. Dropsho ◽

V. Kursun ◽

D.H. Albonesi ◽

S. Dwarkadas ◽

E.G. Friedman

Keyword(s):

Functional Units

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Using modern graphics architectures for general-purpose computing: a framework and analysis

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176259 ◽

2003 ◽

Cited By ~ 51

Author(s):

C.J. Thompson ◽

Sahngyun Hahn ◽

M. Oskin

Keyword(s):

General Purpose

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A faster optimal register allocator

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176254 ◽

2003 ◽

Cited By ~ 1

Author(s):

Changqing Fu ◽

K. Wilken

Keyword(s):

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Fetching instruction streams

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176264 ◽

2003 ◽

Cited By ~ 16

Author(s):

A. Ramirez ◽

O.J. Santana ◽

J.L. Larriba-Pey ◽

M. Valero

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Dynamic frequency and voltage control for a multiple clock domain microarchitecture

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176263 ◽

2003 ◽

Cited By ~ 53

Author(s):

G. Semeraro ◽

D.H. Albonesi ◽

S.G. Dropsho ◽

G. Magklis ◽

S. Dwarkadas ◽

...

Keyword(s):

Voltage Control ◽

Dynamic Frequency

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Dynamic addressing memory arrays with physical locality

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176247 ◽

2003 ◽

Cited By ~ 1

Author(s):

S. Hsu ◽

Shih-Lien Lu ◽

Shih-Chang Lai ◽

R. Krishnamurthy ◽

K. Lai

Keyword(s):

Memory Arrays ◽

Physical Locality

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Compiler managed micro-cache bypassing for high performance EPIC processors

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176245 ◽

2003 ◽

Author(s):

Youfeng Wu ◽

R. Rakvic ◽

Li-Ling Chen ◽

Chyi-Chang Miao ◽

G. Chrysos ◽

...

Keyword(s):

High Performance ◽

Epic Processors

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Master/Slave Speculative Parallelization

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings. ◽

10.1109/micro.2002.1176241 ◽

2003 ◽

Cited By ~ 41

Author(s):

C. Zilles ◽

G. Sohi

Keyword(s):

Speculative Parallelization

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35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings.Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

Compiling for instruction cache performance on a multithreaded architecture

Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor

Managing static leakage energy in microprocessor functional units

Using modern graphics architectures for general-purpose computing: a framework and analysis

A faster optimal register allocator

Fetching instruction streams

Dynamic frequency and voltage control for a multiple clock domain microarchitecture

Dynamic addressing memory arrays with physical locality

Compiler managed micro-cache bypassing for high performance EPIC processors

Master/Slave Speculative Parallelization

35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings.
Latest Publications