1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Latest Publications

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Published By IEEE Comput. Soc

0818681683

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Generation and verification of tests for analogue circuits subject to process parameter deviations

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628315 ◽

2002 ◽

Cited By ~ 11

Author(s):

S.J. Spinks ◽

C.D. Chalk ◽

I.M. Bell ◽

M. Zwolinski

Keyword(s):

Process Parameter ◽

Analogue Circuits

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Application of a yield model merging critical areas and defectivity to industrial products

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628304 ◽

2002 ◽

Cited By ~ 7

Author(s):

S. Levasseur ◽

F. Duvivier

Keyword(s):

Industrial Products ◽

Yield Model ◽

Critical Areas ◽

Model Merging

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On-line error detection for finite field multipliers

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628338 ◽

2002 ◽

Cited By ~ 2

Author(s):

M. Gossel ◽

S. Fenn ◽

D. Taylor

Keyword(s):

Finite Field ◽

Error Detection ◽

On Line

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A cost model for VLSI/MCM systems

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628320 ◽

2002 ◽

Author(s):

M. Kafrouni ◽

C. Thibeault ◽

Y. Savaria

Keyword(s):

Cost Model

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Fast error-correcting Newton-Raphson dividers using time shared TMR

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628331 ◽

2002 ◽

Cited By ~ 2

Author(s):

W.L. Gallagher ◽

E.E. Swartzlander

Keyword(s):

Newton Raphson

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Concurrent testing of VLSI digital signal processors using mutation based testing

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628314 ◽

2002 ◽

Author(s):

C. Aktouf ◽

G. Al-Hayek ◽

C. Robach

Keyword(s):

Digital Signal ◽

Digital Signal Processors ◽

Concurrent Testing ◽

Signal Processors

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Design of compact and high speed totally self-checking CMOS checkers for m-out-of-n codes

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628318 ◽

2002 ◽

Cited By ~ 1

Author(s):

X. Kavousianis ◽

D. Nikolos ◽

G. Sidiropoulos

Keyword(s):

High Speed

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Fault-tolerant hierarchical interconnection networks constructed by additional bypass linking with graph-node coloring

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628329 ◽

2002 ◽

Cited By ~ 1

Author(s):

N. Tsuda

Keyword(s):

Interconnection Networks ◽

Fault Tolerant ◽

Graph Node

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Compact and low power on-line self-testing voting scheme

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628319 ◽

2002 ◽

Cited By ~ 5

Author(s):

C. Metra ◽

M. Favalli ◽

B. Ricco

Keyword(s):

Low Power ◽

Self Testing ◽

On Line ◽

Voting Scheme

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Design of encoders and self-testing checkers for some systematic unidirectional error detecting codes

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1997.628317 ◽

2002 ◽

Cited By ~ 7

Author(s):

S.J. Piestrak

Keyword(s):

Self Testing ◽

Unidirectional Error ◽

Error Detecting

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1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI SystemsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

Generation and verification of tests for analogue circuits subject to process parameter deviations

Application of a yield model merging critical areas and defectivity to industrial products

On-line error detection for finite field multipliers

A cost model for VLSI/MCM systems

Fast error-correcting Newton-Raphson dividers using time shared TMR

Concurrent testing of VLSI digital signal processors using mutation based testing

Design of compact and high speed totally self-checking CMOS checkers for m-out-of-n codes

Fault-tolerant hierarchical interconnection networks constructed by additional bypass linking with graph-node coloring

Compact and low power on-line self-testing voting scheme

Design of encoders and self-testing checkers for some systematic unidirectional error detecting codes

1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Latest Publications