2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)
Latest Publications

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High-Quality Memory Test

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.17 ◽

2006 ◽

Author(s):

M. Azimane

Keyword(s):

Memory Test ◽

High Quality

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Fault-Pattern Oriented Defect Diagnosis for Flash Memory

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.13 ◽

2006 ◽

Author(s):

Mu-Hsien Hsu ◽

Yu-Tsao Hsing ◽

Jen-Chieh Yeh ◽

Cheng-Wen Wu

Keyword(s):

Flash Memory ◽

Fault Pattern ◽

Defect Diagnosis

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Non-volatile Semiconductor Memory Technology in Nanotech Era

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.21 ◽

2006 ◽

Author(s):

Chih-Yuan Lu

Keyword(s):

Semiconductor Memory

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Future Prospective of Programmable Logic Non-volatile Device

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.16 ◽

2006 ◽

Cited By ~ 2

Author(s):

C. Hsu

Keyword(s):

Programmable Logic

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DDR2 DRAM Output Timing Optimization

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.9 ◽

2006 ◽

Cited By ~ 2

Author(s):

J. Vollrath ◽

J. Schwizer ◽

M. Gnat ◽

R. Schneider ◽

B. Johnson

Keyword(s):

Timing Optimization

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SRAM Design Techniques for Sub-nano CMOS Technology

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.29 ◽

2006 ◽

Author(s):

J. Lai

Keyword(s):

Cmos Technology ◽

Sram Design ◽

Design Techniques

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Comparison of Electrical and Reliability Characteristics of Different Tunnel Oxides in SONOS Flash Memory

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.8 ◽

2006 ◽

Author(s):

Jia-Lin Wu ◽

Hua-Ching Chien ◽

Chien-Wei Liao ◽

Cheng-Yen Wu ◽

Chih-Yuan Lee ◽

...

Keyword(s):

Flash Memory ◽

Reliability Characteristics ◽

Tunnel Oxides

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A March-Based Algorithm for Location and Full Diagnosis of All Unlinked Static Faults

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.5 ◽

2006 ◽

Cited By ~ 1

Author(s):

T.A. Gyonjyan ◽

G. Harutunyan ◽

V.A. Vardanian

Keyword(s):

Static Faults

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Detailed Comparisons of Program, Erase and Data Retention Characteristics between P+- and N+-Poly SONOS NAND Flash Memory

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.10 ◽

2006 ◽

Author(s):

Victor Chao-Wei Kuo ◽

Chih-Ming Chao ◽

Chih-Kai Kang ◽

Li-Wei Liu ◽

Tzung-Bin Huang ◽

...

Keyword(s):

Flash Memory ◽

Nand Flash ◽

Nand Flash Memory ◽

Data Retention ◽

Retention Characteristics

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MRAM Write Error Categorization with QCKB

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06) ◽

10.1109/mtdt.2006.19 ◽

2006 ◽

Cited By ~ 2

Author(s):

Y. Shimizu ◽

H. Aikawa ◽

K. Hosotani ◽

N. Shimomura ◽

Tadashi Kai Yoshihiro ◽

...

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2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

High-Quality Memory Test

Fault-Pattern Oriented Defect Diagnosis for Flash Memory

Non-volatile Semiconductor Memory Technology in Nanotech Era

Future Prospective of Programmable Logic Non-volatile Device

DDR2 DRAM Output Timing Optimization

SRAM Design Techniques for Sub-nano CMOS Technology

Comparison of Electrical and Reliability Characteristics of Different Tunnel Oxides in SONOS Flash Memory

A March-Based Algorithm for Location and Full Diagnosis of All Unlinked Static Faults

Detailed Comparisons of Program, Erase and Data Retention Characteristics between P+- and N+-Poly SONOS NAND Flash Memory

MRAM Write Error Categorization with QCKB

2006 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'06)
Latest Publications