Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637)
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Testing of deep-submicron battery-operated circuits using new fast current monitoring scheme

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843692 ◽

2002 ◽

Cited By ~ 3

Author(s):

M. Margala ◽

I. Pecuh

Keyword(s):

Deep Submicron ◽

Monitoring Scheme ◽

Current Monitoring

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Feasibility of current measurements in sub 0.25-micron VLSIs

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843683 ◽

2002 ◽

Author(s):

A. Keshavarzi ◽

S. Borkar ◽

V. De

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Charge based testing (CBT) of submicron CMOS SRAMs

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843691 ◽

2002 ◽

Cited By ~ 3

Author(s):

M. Rosales ◽

I. de Paul ◽

J. Segura ◽

C.F. Hawkins ◽

J. Soden

Keyword(s):

Submicron Cmos

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I/sub DDQ/ profiles: a technique to reduce test escape and yield loss during I/sub DDQ/ testing

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843689 ◽

2002 ◽

Author(s):

Hugo Cheung ◽

S.K. Gupta

Keyword(s):

Yield Loss

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Optimal clustering and statistical identification of defective ICs using I/sub DDQ/ testing

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843687 ◽

2002 ◽

Cited By ~ 1

Author(s):

A. Rao ◽

A.P. Jayasumana ◽

Y.K. Malaiya

Keyword(s):

Statistical Identification

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Defect-based testing for fabless companies

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843686 ◽

2002 ◽

Cited By ~ 1

Author(s):

J. Khare ◽

H.T. Heubeken

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A new scheme for effective I/sub DDQ/ testing in deep submicron

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843684 ◽

2002 ◽

Cited By ~ 1

Author(s):

Y. Tsiatouhas ◽

Y. Moisiadis ◽

T. Haniotakis ◽

D. Nikolos ◽

A. Arapoyanni

Keyword(s):

Deep Submicron

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Impact of technology scaling on bridging fault detections in sequential and combinational CMOS circuits

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843688 ◽

2002 ◽

Cited By ~ 1

Author(s):

O. Semenov ◽

M. Sachdev

Keyword(s):

Cmos Circuits ◽

Technology Scaling ◽

Bridging Fault ◽

Impact Of Technology

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Requirements for practical I/sub DDQ/ testing of deep submicron circuits

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843685 ◽

2002 ◽

Cited By ~ 8

Author(s):

D.M.H. Walker

Keyword(s):

Deep Submicron ◽

Deep Submicron Circuits

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IDDQ testable design of static CMOS PLAs

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637) ◽

10.1109/dbt.2000.843693 ◽

2002 ◽

Author(s):

M. Hashizume ◽

H. Hoshika ◽

H. Yotsuyangi ◽

T. Tamesada

Keyword(s):

Testable Design

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Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

Testing of deep-submicron battery-operated circuits using new fast current monitoring scheme

Feasibility of current measurements in sub 0.25-micron VLSIs

Charge based testing (CBT) of submicron CMOS SRAMs

I/sub DDQ/ profiles: a technique to reduce test escape and yield loss during I/sub DDQ/ testing

Optimal clustering and statistical identification of defective ICs using I/sub DDQ/ testing

Defect-based testing for fabless companies

A new scheme for effective I/sub DDQ/ testing in deep submicron

Impact of technology scaling on bridging fault detections in sequential and combinational CMOS circuits

Requirements for practical I/sub DDQ/ testing of deep submicron circuits

IDDQ testable design of static CMOS PLAs

Proceedings 2000 IEEE International Workshop on Defect Based Testing (Cat. No.PR00637)
Latest Publications