Step-graded AlGaN vs superlattice: Role of strain relief layer in dynamic on-resistance degradation

In this work, we study the impacts of different types of strain relief layer (SRL) on dynamic on-resistance (Ron) degradation of GaN power devices on Si by back-gate ramping and vertical leakage measurement. Our study reveals that the SRL has important effects on the dynamic Ron. Compared with step-graded AlGaN SRL, the superlattice SRL possesses much more energy barriers, which can more effectively block the leakage of holes from GaN buffer and the injection of electrons from Si substrate. Enhancing the carrier blocking ability of SRL could contribute to the suppression of dynamic Ron degradation.

High Breakdown Voltage and Low Buffer Trapping in Superlattice GaN-on-Silicon Heterostructures for High Voltage Applications

The aim of this work is to demonstrate high breakdown voltage and low buffer trapping in superlattice GaN-on-Silicon heterostructures for high voltage applications. To this aim, we compared two structures, one based on a step-graded (SG) buffer (reference structure), and another based on a superlattice (SL). In particular, we show that: (i) the use of an SL allows us to push the vertical breakdown voltage above 1500 V on a 5 µm stack, with a simultaneous decrease in vertical leakage current, as compared to the reference GaN-based epi-structure using a thicker buffer thickness. This is ascribed to the better strain relaxation, as confirmed by X-Ray Diffraction data, and to a lower clustering of dislocations, as confirmed by Defect Selective Etching and Cathodoluminescence mappings. (ii) SL-based samples have significantly lower buffer trapping, as confirmed by substrate ramp measurements. (iii) Backgating transient analysis indicated that traps are located below the two-dimensional electron gas, and are related to CN defects. (iv) The signature of these traps is significantly reduced on devices with SL. This can be explained by the lower vertical leakage (filling of acceptors via electron injection) or by the slightly lower incorporation of C in the SL buffer, due to the slower growth process. SL-based buffers therefore represent a viable solution for the fabrication of high voltage GaN transistors on silicon substrate, and for the simultaneous reduction of trapping processes.

Vertical Leakage in GaN-on-Si Stacks Investigated by a Buffer Decomposition Experiment

We investigated the origin of vertical leakage and breakdown in GaN-on-Si epitaxial structures. In order to understand the role of the nucleation layer, AlGaN buffer, and C-doped GaN, we designed a sequential growth experiment. Specifically, we analyzed three different structures grown on silicon substrates: AlN/Si, AlGaN/AlN/Si, C:GaN/AlGaN/AlN/Si. The results demonstrate that: (i) the AlN layer grown on silicon has a breakdown field of 3.25 MV/cm, which further decreases with temperature. This value is much lower than that of highly-crystalline AlN, and the difference can be ascribed to the high density of vertical leakage paths like V-pits or threading dislocations. (ii) the AlN/Si structures show negative charge trapping, due to the injection of electrons from silicon to deep traps in AlN. (iii) adding AlGaN on top of AlN significantly reduces the defect density, thus resulting in a more uniform sample-to-sample leakage. (iv) a substantial increase in breakdown voltage is obtained only in the C:GaN/AlGaN/AlN/Si structure, that allows it to reach VBD > 800 V. (v) remarkably, during a vertical I–V sweep, the C:GaN/AlGaN/AlN/Si stack shows evidence for positive charge trapping. Holes from C:GaN are trapped at the GaN/AlGaN interface, thus bringing a positive charge storage in the buffer. For the first time, the results summarized in this paper clarify the contribution of each buffer layer to vertical leakage and breakdown.

Impact of Silicon Substrate with Low Resistivity on Vertical Leakage Current in AlGaN/GaN HEMTs

The role of low-resistivity substrate on vertical leakage current (VLC) of AlGaN/GaN-on-Si epitaxial layers has been investigated. AlGaN/GaN high-electron-mobility transistors (HEMTs) grown on both p-type and n-type Si substrates with low resistivity are applied to analyze the vertical leakage mechanisms. The activation energy (Ea) for p-type case is higher than that for n-type at 0–600 V obtained by temperature-dependent current-voltage measurements. An additional depletion region in the region of 0–400 V forms at the AlN/p-Si interface but not for AlN/n-Si. That depletion region leads to a decrease of electron injection and hence effectively reduces the VLC. While in the region of 400–600 V, the electron injection from p-Si substrate increases quickly compared to n-Si substrate, due to the occurrence of impact ionization in the p-Si substrate depletion region. The comparative results indicate that the doping type of low-resistivity substrate plays a key role for VLC.