quiescent signal analysis
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Author(s):  
Jim Plusquellic ◽  
Dhruva Acharyya ◽  
Mohammad Tehranipoor ◽  
Chintan Patel

Abstract Quiescent Signal Analysis (QSA) is an IDDQ method for detecting defects that is based on the analysis of multiple simultaneous measurements of supply port IDDQs. The nature of the information in the multiple IDDQs measurements also allows for the localization of the defect to physical coordinates in the chip. In previous work, we derived a hyperbola-based method from simulation experiments that is able to "triangulate" the position of the defect in the layout. In this paper, we evaluate the accuracy of this method using data collected from 12 chips fabricated in a 65 nm process.


2006 ◽  
Vol 23 (4) ◽  
pp. 278-293 ◽  
Author(s):  
J. Plusquellic ◽  
D. Acharyya ◽  
A. Singh ◽  
M. Tehranipoor ◽  
C. Patel

2005 ◽  
Vol 21 (5) ◽  
pp. 463-483
Author(s):  
Chintan Patel ◽  
Abhishek Singh ◽  
Jim Plusquellic

Author(s):  
Chintan Patel ◽  
Ernesto Staroswiecki ◽  
Smita Pawar ◽  
Dhruva Acharyya ◽  
Jim Plusquellic

Abstract Quiescent Signal Analysis (QSA) is a novel electrical-test-based diagnostic technique that uses IDDQ measurements made at multiple chip supply pads as a means of locating shorting defects in the layout. The use of multiple supply pads reduces the adverse effects of leakage current by scaling the total leakage current over multiple measurements. In previous work, a resistance model for QSA was developed and demonstrated on a small circuit. In this paper, the weaknesses of the original QSA model are identified, in the context of a production power grid (PPG) and probe card model, and a new model is described. The new QSA algorithm is developed from the analysis of IDDQ contour plots. A “family” of hyperbola curves is shown to be a good fit to the contour curves. The parameters to the hyperbola equations are derived with the help of inserted calibration transistors. Simulation experiments are used to demonstrate the prediction accuracy of the method on a PPG.


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