A streamlined drain-lag model for GaN HEMTs based on pulsed S-parameter measurements

Accurately and efficiently modeling the drain-lag effects is crucial in nonlinear large-signal modeling for Gallium Nitride high electron mobility transistors. In this paper, a simplified yet accurate drain-lag model based on an industry standard large-signal model, i.e., the Chalmers (Angelov) model, extracted by means of pulsed S-parameter measurements, is presented. Instead of a complex nonlinear drain-lag description, only four constant parameters of the proposed drain-lag model need to be determined to accurately describe the large impacts of the drain-lag effects, e.g., drain-source current slump, typical kink observed in pulsed IV curves, and degradation of the output power. The extraction procedure of the parameters is based on pulsed S-parameter measurements, which allow to freeze traps and isolate the trapping effects from self-heating. It is also shown that the model can very accurately predict the load pull performance over a wide range of drain bias voltages. Finally, the large-signal network analyzer measurements at low frequency are used to further verify the proposed drain-lag model in the prediction of the output current in time domain under large-signal condition.

GaN HEMT Drain-Lag Performance Dependence on GaN Channel Quality

ABSTRACTIn this study, we investigated GaN channel layer quality to suppress drain-lag, which is an important parameter for switching performance. In this experiment, we confirmed that drain-lag performance has dependence on the tilt of the GaN channel layer. GaN channel layer with the tilt angle of 243 arcsec showed faster drain-lag recovery than the tilt angle of 209 arcsec. The results of the drain-lag test and isolation leakage current measurement indicated that the tilt angle and hopping distance contributed to drain-lag recovery. We proposed the mechanism of trap effect during the drain-lag test.