Sirius: a prototype astronomical intensity interferometer using avalanche photodiodes in linear mode

ABSTRACT Optical intensity interferometry, developed in the 1950s, is a simple and inexpensive method for achieving angular resolutions on microarcsecond scales. Its low sensitivity has limited intensity interferometric observations to bright stars so far. Substantial improvements are possible by using avalanche photodiodes (APDs) as light detectors. Several recent experiments used APDs in single-photon detection mode; however, these either provide low electronic bandwidths (few MHz) or require very narrow optical bandpasses. We present here the results of laboratory measurements with a prototype astronomical intensity interferometer using two APDs observing an artificial star in continuous (‘linear’) detection mode with an electronic bandwidth of 100 MHz. We find a photon–photon correlation of about 10−6, as expected from the ratio of the coherence times of the light source and the detectors. In a configuration where both detectors are on the optical axis (zero baseline), we achieve a signal-to-noise ratio of ∼2700 after 10 min of integration. When measuring the correlation as a function of baseline, we find a Gaussian correlation profile with a standard deviation corresponding to an angular half-width of the artificial star of 0.55 arcsec, in agreement with the estimate by the manufacturer. Our results demonstrate the possibility to construct large astronomical intensity interferometers using linear-mode APDs.

FPGA-Based TDC for Single-Photon Intensity Interferometry

A prototype intensity interferometer readout for single-photon detectors is presented as a time-to-digital converter (TDC) implemented on a field-programmable gate array (FPGA). We briefly discuss the history and scientific motivations for the instrument. A comparison is drawn between the use of photomultiplier tubes in linear mode and single-photon avalanche diodes (SPAD) in Geiger mode. Different FPGA-based TDC configurations are discussed. We describe the design and implementation of a four-phase FPGA-based TDC. The paper concludes with the application of the design to investigate SPAD after-pulsing and a description of future work.