Temperature Effect on Al/p-CuInS2/SnO2(F) Schottky Diodes

In this paper, Schottky diodes (SDs) obtained by evaporated thin films of aluminum on pulverized p-CuInS2/SnO2:F have been studied using J-V-T characteristics in a temperature range of 200-340K. These characteristics show that aluminum acts as a rectifier metal-semiconductor contact. Characteristic variables of the Al/p-CuInS2/SnO2:F junctions, such as the current density, the serial resistance, the parallel conductance, the Schottky barrier height (SBH), and the ideality factor of the SD were obtained by fitting the J-V-T data using the Lambert function. Data analysis was conducted with the use of MATLAB. Results showed that n is greater than 1, which could be explained by the existence of inhomogeneities due to the grain boundaries in CuInS2. Through this analysis, one can see a good agreement between experimental and modeled data. The study has shown that the main contribution in the current conduction in such heterostructures is the thermionic emission (TE) supported by the recombination of the carriers. The last phenomenon appears mainly in the grain boundaries, which contain both intrinsic and extrinsic defects (secondary phases, segregated oxygen). An investigation of the J-V-T characteristics according to TE theory has demonstrated that the current density and the SBH increase while serial resistance, parallel conductance decrease with an increase in temperature. After an SBH inhomogeneity correction, the modified Richardson constant and the mean barrier height were found to be 120AK-2cm-2 and 1.29eV respectively. This kind of behavior has been observed in many metal-semiconductor contacts.

Positive phase error from parallel conductance in tetrapolar bio-impedance measurements and its compensation

Bioimpedance measurements are of great use and can provide considerable insight into biological processes. However, there are a number of possible sources of measurement error that must be considered. The most dominant source of error is found in bipolar measurements where electrode polarisation effects are superimposed on the true impedance of the sample. Even with the tetrapolar approach that is commonly used to circumvent this issue, other errors can persist. Here we characterise the positive phase and rise in impedance magnitude with frequency that can result from the presence of any parallel conductive pathways in the measurement set-up. It is shown that fitting experimental data to an equivalent electrical circuit model allows for more accurate determination of the true sample impedance as validated through finite element modelling (FEM) of the measurement chamber. Finally, the equivalent circuit model is used to extract dispersion information from cell cultures to characterise their growth.

Re-Investigation of SiC/SiO2 Interface Passivation by Nitrogen Annealing

Effect of nitrogen annealing on SiC/SiO2 interface properties was comparatively investigated for SiC MOS capacitors. Interface properties were characterized by normalized parallel conductance and interface state density value, and dielectric strength was evaluated by the electric-field-to-breakdown (Ebd). The results exhibited that both fast and slow states were present at the nitrogen-annealed samples’ parallel conductance characteristics. Thus, we could conclude that nitrogen annealing led to incomplete nitridation of SiC/SiO2 interface. Based on the results, nitridation mechanism was simply analyzed. It seemed that the nitridation process started from near conduction band, extending till to mid-band-gap. Besides, when the samples underwent higher temperature nitrogen annealing, more slow states were converted into fast ones, indicating that higher annealing temperature could lead to more effective nitridation. It was suggested that nitrogen annealing resulted in incomplete nitridation of SiC/SiO2 interface regardless of oxide thickness and that this process was limited to the annealing temperature. The higher the annealing temperature was, the more effective the nitridation effects were.

Electrical Performance of a 32-I/O HTCC Alumina Package for High-Temperature Microelectronics

A high-temperature cofired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550°C and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high-temperature packaging applications. This article introduces a prototype 32-input/output (I/O) HTCC alumina package with platinum conductor for 500°C low-power SiC-integrated circuits. The design and electrical performance of this package, including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550°C, are discussed in detail. The parasitic capacitance and parallel conductance of neighboring I/Os of this package in the entire frequency and temperature ranges measured do not exceed 1.5 pF and 0.05 μS, respectively. SiC-integrated circuits using this package and a compatible alumina circuit board have been successfully tested at 500°C for more than 3,736 h continuously, and at 700°C for more than 140 h. Some test examples of SiC-integrated circuits with this packaging system are presented.

Electrical Performance of a High Temperature 32-I/O HTCC Alumina Package

A high temperature co-fired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550 °C, and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high temperature packaging applications. This paper introduces a prototype 32-I/O (input/output) HTCC alumina package with platinum conductor for 500 °C low-power silicon carbide (SiC) integrated circuits. The design and electrical performance of this package including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550 °C are discussed in detail. The parasitic capacitance and parallel conductance of this package in the entire frequency and temperature ranges measured does not exceed 1.5 pF and 0.05 μS, respectively. SiC integrated circuits using this package and compatible printed circuit board have been successfully tested at 500 °C for over 3736 hours continuously, and at 700 °C for over 140 hours. Some test examples of SiC integrated circuits with this packaging system are presented. This package is the key to prolonged T ≥ 500 °C operational testing of the new generation of SiC high temperature integrated circuits and other devices currently under development at NASA Glenn Research Center.

Impact of surrounding tissue on conductance measurement of coronary and peripheral lumen area

Parallel conductance (electric current flow through surrounding tissue) is an important determinant of accurate measurements of arterial lumen diameter, using the conductance method. The present study is focused on the role of non-uniform geometrical/electrical configurations of surrounding tissue, which are a primary source of electric current leakage. Computational models were constructed to simulate the conductance catheter measurement with two different excitation electrodes spacings (i.e. 12 and 20 mm for coronary and peripheral sizing, respectively) for different vessel–tissue configurations: (i) blood vessel fully embedded in muscle tissue, (ii) blood vessel superficially embedded in muscle tissue, and (iii) blood vessel superficially embedded in muscle tissue with fat covering half of the arterial vessel (anterior portion). The simulations suggest that the parallel conductance and accuracy of measurement is dependent on the inhomogeneous/anisotropic configuration of surrounding tissue, including the asymmetric dimension and anisotropy in electrical conductivity of surrounding tissue. Specifically, the measurement was shown to be accurate as long as the vessel was superficial, regardless of the considerable total surrounding tissue dimension for coronary or peripheral arteries. Moreover, it was shown that the unfavourable impact of parallel conductance on the accuracy of conductance catheter measurement is decreased by the combination of a lower transverse electrical conductivity of surrounding muscle tissue, a smaller electrode spacing and a larger lumen diameter. The present findings confirm that the conductance catheter technique provides an accurate platform for sizing of clinically relevant (i.e. superficial and diseased) arteries.

Abstract P333: A Study of Miniature Catheters' Spatial Electric Field Heterogeneity During Murine Cardiac Catheterizations

Conductance catheters allow real-time quantification of hemodynamics, allowing cardiac functional characterization, an important predictor of long-term prognosis in cardiac disease. The technique’s accuracy is, however, inherently limited by the signal contribution from surrounding structures (spatially and temporally varying). Despite prior attempts to quantify this effect (known as parallel conductance) no prior study assessed the spatial heterogeneity of the catheter's E-field. This study quantifies the E-field penetration pattern, accounting for tissue properties and geometry. Ten C57BL/6J mice were induced and maintained with 1.5% isoflurane mixed in 100% O 2 . One C57BL/6J mouse underwent a right carotid catheterization for placement of a 1.4 Fr Pressure-Volume Millar catheter in the left ventricle (LV), followed by microCT imaging (80kV/160mA/10ms exposure/240 projections/rotation angle=1.5 o ). Multiphase MRI was performed using a 4D radial spiral pulse sequence (TE=300μs/TR=2.4ms/BW=125kHz/flip angle=45 o /110μm 3 resolution). Segmentation allowed LV myocardial and blood region extractions from MRI and construction of finite element End-Diastolic and End-Systolic models. The catheter’s orientation in the LV was determined from micro-CT image data renditions. Generated LV and blood models were then imported in the software XFdtd and electrical properties were assigned for all materials. Simulations used a 20 μA, 20 kHz sinusoidal current, and ran for a lump component equivalent and a constructed blood-myocardial geometrical model. Specific absorption rate (SAR) maps yielded total tissue deposited power. Simulations show that the catheter’s E-field in lump component and geometrical models, drops to 10% of its peak value at 0.4-0.6mm, and 1.1-2mm, respectively, away from the excitation electrodes. SAR maps yielded a <1% power leakage into surrounding structures at two different myocardial permittivity values of ε r =11844 and 38615. Results from this study map the spatial dependence of the generated catheter E-field. Spatial E-field maps indicate that the field is primarily confined within the ventricular chamber with a relatively uniform spatial pattern, and with <1% of the input power leaking in surrounding structures.