A Novel Method for Detecting Parametric Faults in Analog Circuits using Fuzzy Logic

The demand for testability analysis of analog circuits has been increased in recent years. The fault detection and fault classification method is important in detecting the parametric faults of the circuit. In this paper, Simulation Before Test (SBT) is considered as a basic mechanism for detecting the parametric faults.. The circuit Under Test (CUT) used is Sallen-Key bandpass filter. Transfer function of the CUT is used for fault detection by locating the poles and Zeros of the transfer function. Fuzzy logic is used for fault classification.

Hybrid Qualitative and Quantitative Diagnosis Approach

Parametric faults are detected and isolated using parameter tracking algorithms based on optimization algorithms or filtering techniques (e.g., Kalman filter, particle filter). Online, simultaneous tracking of all parametric faults can fails since there may be too many combinations of parameter values that explain the observed behavior. Hence, a correct diagnosis solution is not obtained. An alternative in the single fault case is to track separately each parametric fault in parallel and choose the one that best explains the observed behavior according to some chosen metric (e.g., mean square error). This approach is feasible but computationally expensive, since there may be too many tracking algorithms running in parallel. We propose using analytic redundancy relations (ARRs) to reduce the number of parametric faults that are tracked simultaneously. ARRs qualitatively point to a set of possible explanations but usually require a large number of sensors to achieve good isolability of fault causes. They induce a fault signature matrix (FSM) that can be derived offline. The parameter tracking algorithms will be instantiated for the faults in the set of possible explanations produced by the ARRs. By combining ARRs with online parameter tracking algorithms we can obtain a good tradeoff between computational effort and fault isolability. We demonstrate our approach by diagnosing faults in a rectifier circuit.

Design of an Oscillation-Based BIST System for Active Analog Integrated Filters in 0.18 µm CMOS

In this paper, an oscillation-based built-in self-test system for active an analog integrated circuit is presented. This built-in self-test system was used to detect catastrophic and parametric faults, introduced during chip manufacturing. As circuits under test (CUT), second-order Sallen-Key, Akerberg-Mossberg and Tow-Thomas biquad filters were designed. The proposed test hardware detects parametric and catastrophic faults on changeable limits. The influence of both oscillation and test hardware on fault detection limits were investigated and analyzed. The proposed oscillation based self-test system was designed and simulated in 0.18 µm complementary metal-oxide semiconductor (CMOS) technology. Due to the easiness of implementation and configuration for testing of different active analog filters, such self-test systems can be effectively used in modern integrated circuits, made of a large number of devices and circuits, such as the multi-standard transceivers used in the core hardware of software-defined radios. Using the proposed test strategy, the fault tolerance limits for catastrophic faults varied from 96% to 100% for all injected faults in different structures of low pass filters (LPF). The detection range of parametric faults of passive components’ nominal value, depending on the used structure of the filter, did not exceed –0.74% – 0.72% in case of Sallen-Key, –3.31% – 1.00% in case of Akerberg-Mossberg and –2.39% – 1.44% in case of Tow-Thomas LPF.