test set compaction Latest Research Papers

New testability analysis and multi-frequency test set compaction method for analogue circuits

2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC) ◽

10.1109/jec-ecc.2016.7518961 ◽

2016 ◽

Cited By ~ 3

Author(s):

Mohamed S. Saleh ◽

Mohamed H. El-Mahlawy ◽

Hossam E. Abou-Bakr Hassan

Keyword(s):

Test Set ◽

Frequency Test ◽

Testability Analysis ◽

Analogue Circuits ◽

Compaction Method ◽

Test Set Compaction

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A research of heuristic optimization approaches to the test set compaction procedure based on a decomposition tree for combinational circuits

East-West Design & Test Symposium (EWDTS 2013) ◽

10.1109/ewdts.2013.6673219 ◽

2013 ◽

Author(s):

Valentina Andreeva ◽

Kirill A. Sorudeykin

Keyword(s):

Heuristic Optimization ◽

Combinational Circuits ◽

Decomposition Tree ◽

Test Set ◽

Test Set Compaction

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Test set compaction procedure for combinational circuits based on decomposition tree

2011 9th East-West Design & Test Symposium (EWDTS) ◽

10.1109/ewdts.2011.6116596 ◽

2011 ◽

Cited By ~ 3

Author(s):

Valentina Andreeva

Keyword(s):

Combinational Circuits ◽

Decomposition Tree ◽

Test Set ◽

Test Set Compaction

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A new approach for test set compaction in combinational circuits

2011 3rd International Conference on Electronics Computer Technology ◽

10.1109/icectech.2011.5941624 ◽

2011 ◽

Author(s):

S M. Thamarai ◽

K. Kuppusamy ◽

T. Meyyappan

Keyword(s):

Combinational Circuits ◽

Test Set ◽

New Approach ◽

Test Set Compaction

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On low power test and DFT techniques for test set compaction

10.17077/etd.2bph30y6 ◽

2008 ◽

Author(s):

Santiago Remersaro

Keyword(s):

Low Power ◽

Test Set ◽

Power Test ◽

Low Power Test ◽

Test Set Compaction

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Application of Sequential Test Set Compaction to LFSR Reseeding

2008 NORCHIP ◽

10.1109/norchp.2008.4738292 ◽

2008 ◽

Cited By ~ 2

Author(s):

Igor Aleksejev ◽

Artur Jutman ◽

Jaan Raik ◽

Raimund Ubar

Keyword(s):

Sequential Test ◽

Test Set ◽

Lfsr Reseeding ◽

Test Set Compaction

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Hybrid BIST optimization using reseeding and test set compaction

Microprocessors and Microsystems ◽

10.1016/j.micpro.2008.03.007 ◽

2008 ◽

Vol 32 (5-6) ◽

pp. 254-262 ◽

Cited By ~ 1

Author(s):

Gert Jervan ◽

Elmet Orasson ◽

Helena Kruus ◽

Raimund Ubar

Keyword(s):

Test Set ◽

Test Set Compaction

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Hybrid BIST Optimization Using Reseeding and Test Set Compaction

10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007) ◽

10.1109/dsd.2007.4341529 ◽

2007 ◽

Cited By ~ 3

Author(s):

Gert Jervan ◽

Elmet Orasson ◽

Helena Kruus ◽

Raimund Ubar

Keyword(s):

Test Set ◽

Test Set Compaction

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On applying set covering models to test set compaction

Proceedings Ninth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1999.757365 ◽

2003 ◽

Cited By ~ 12

Author(s):

P.F. Flores ◽

H.C. Neto ◽

J.P. Marques-Silva

Keyword(s):

Set Covering ◽

Test Set ◽

Test Set Compaction

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Test set compaction for combinational circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224429 ◽

2003 ◽

Cited By ~ 35

Author(s):

Jau-Shien Chang ◽

Chen-Shang Lin

Keyword(s):

Combinational Circuits ◽

Test Set ◽

Test Set Compaction

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test set compaction
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

New testability analysis and multi-frequency test set compaction method for analogue circuits

A research of heuristic optimization approaches to the test set compaction procedure based on a decomposition tree for combinational circuits

Test set compaction procedure for combinational circuits based on decomposition tree

A new approach for test set compaction in combinational circuits

On low power test and DFT techniques for test set compaction

Application of Sequential Test Set Compaction to LFSR Reseeding

Hybrid BIST optimization using reseeding and test set compaction

Hybrid BIST Optimization Using Reseeding and Test Set Compaction

On applying set covering models to test set compaction

Test set compaction for combinational circuits

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test set compactionRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

New testability analysis and multi-frequency test set compaction method for analogue circuits

A research of heuristic optimization approaches to the test set compaction procedure based on a decomposition tree for combinational circuits

Test set compaction procedure for combinational circuits based on decomposition tree

A new approach for test set compaction in combinational circuits

On low power test and DFT techniques for test set compaction

Application of Sequential Test Set Compaction to LFSR Reseeding

Hybrid BIST optimization using reseeding and test set compaction

Hybrid BIST Optimization Using Reseeding and Test Set Compaction

On applying set covering models to test set compaction

Test set compaction for combinational circuits

test set compaction
Recently Published Documents