The Use of Artificial Intelligence-Based Optical Remote Sensing and Positioning Technology in Microelectronic Processing Technology

The purpose is to make defect detection in microelectronic processing technology fast, accurate, reliable, and efficient. A new optical remote sensing-optical beam induced resistance change (ORS-OBIRCH) target recognition and location defect detection method is proposed based on an artificial intelligence algorithm, optical remote sensing (ORS), and optical beam induced resistance change (OBIRCH) location technology using deep convolutional neural network. This method integrates the characteristics of high resolution and rich details of the image obtained by ORS technology and combines the advantages of photosensitive temperature characteristics in OBIRCH positioning technology. It can be adopted to identify, capture, and locate the defects of microdevices in the process of microelectronic processing. Simulation results show that this method can quickly reduce the detection range and locate defects accurately and efficiently. The experimental results reveal that the ORS-OBIRCH target recognition defect location detection method can complete the dynamic synchronization of the IC detection system and obtain high-quality images by changing the laser beam irradiation cycle. Moreover, it can analyze and process the detection results to quickly, accurately, and efficiently locate the defect location. Unlike the traditional detection methods, the success rate of detection has been greatly improved, which is about 95.8%, an increase of nearly 40%; the detection time has been reduced by more than half, from 5.5 days to 1.9 days, and the improvement rate has reached more than 65%. In a word, this method has good practical application value in the field of microelectronic processing.

The Influence of Cellular Debris on Cell Guidance and Implications for Incorporating Silicon Based Micropatterns

ABSTRACTDetermining what external stimuli influence cell differentiation, morphology, and growth continues to be a focus on many research groups to meet the healthcare Grand Challenges. While prior work has shown the influence of stiffness, surface chemistry and topography, these parameters often change in tandem, making it difficult to delineate the role of an individual component. This study examined the possible incorporation of microelectronic processing to produce reusable substrates for cell guidance studies. Subsequent plating of substrates cleaned with methods common in a microelectronic fabrication process showed complex responses including migration. Optical characterization of surfaces after cleaning showed remaining cellular debris that could be removed through the incorporation of a piranha solution. The micro patterned substrates did allow controlled comparison between dental pulp stem cells and osteoblast cells. The dental pulp cells did not show any cell alignment or cell proliferation (as indicated by cell density) with the isotropic or anisotropic micropatterns on the initial plating. The osteoblast cells (control) only aligned with the lines and not any of the other patterns (dots, holes or hexagons).

Fundamentals of Cu/Barrier-Layer Adhesion in Microelectronic Processing

Copper is most widely used interconnect material in present silicon microelectronic technologies. As such, multiple interfaces formed by a thin Cu layer and other materials must be engineered to achieve the desired chemical, mechanical, and electrical properties. Adhesion between Cu and the barrier layer, as well as between Cu and the dielectric, is of particular interest, due to its role in controlling interfacial stability and Cu electromigration behavior [1]. This work focuses on understanding how the interface chemistry affects adhesion. Firstprinciples density functional theory (DFT) calculations were used to determine chemical adhesion energies of interfaces formed by Cu and various metals considered as a diffusion barrier, including Ta, TiN, and W. Calculations predicted increasing adhesion strength in the order of TiN < Si-doped TiN < TaN < Ta, consistent with wetting experiments done using 100Å thick Cu layer samples. The effects of doping at the interface using light elements (C, N, O) were also determined. Calculations were also done for interfaces of Cu with two different classes of amorphous dielectric materials, i.e. silicon nitride and silicon carbide, for which detailed material characterizations are often difficult and time consuming. Calculations predicted Cu/Si-nitride and Cu/Si-carbide adhesion strengths consistent with 4-pt-bend experiments, including the improvement in adhesion energies when silicon was used to dope the interface. In addition, weaker interfaces provide low-resistance diffusion paths for Cu atoms during electromigration. The first-principles based modeling, validated by select adhesion measurements, provides a predictive approach to effectively determine adhesion strengths and predict electromigration reliability in interconnects.

Lateral Superlattices Fabricated with Interferometric Lithography for Nanoscale Device Applications

Two-dimensional periodic arrays of inverted pyramid holes with nanometer scale have been patterned on the surface of a (100) silicon wafer and studied for possible application in nanoscale silicon based devices. The surface patterning employed a simple microelectronic processing scheme in which the standing wave intensity pattern from two interfering 458nm laser beams was used to expose holes in a photoresist layer. Subsequent dry etching through an underlying oxide mask layer, followed by a KOH etching step yielded a highly periodic, large area array of inverted pyramids. The pyramid geometry is formed during the anisotropic KOH etch, which stops at the (111) pyramid walls. Therefore, the tips of all inverted pyramids are formed by the intersection of (111) silicon crystal planes and have identical geometry. This study focuses on the use of these features as templates for the controlled crystallization of amorphous silicon layers and also as electric field concentrating “funnels” in MOS-type structures. We will discuss a proposed device in which silicon nanocrystals will be incorporated into the concentrated electric field region at the tip of each inverted pyramid. With this structure, the charging of identical addressable nanocrystals may be possible, leading to the development of practical nanoscale silicon devices.

The Effects of Environment and Fatigue on the Adhesion and Subcritical Debonding of Dielectric Polymers

The adhesion of thin film polymers will be critical in the integration of low-κ materials into microelectronic processing. This study describes the adhesion of two promising low-κ polymers (polyimide and benzocyclobutene) to a silicon dioxide surface. Critical adhesion values were measured using interface fracture mechanics samples in a double cantilever beam geometry. The effect of subcritical (time-dependent) delamination was also evaluated for these systems. Subcritical debonding data are important in understanding the effect of environment and temperature on interface reliability. To that end, experiments were conducted over a range of humidities to elucidate the effect of moisture on interface delamination. The important effect of the acceleration of debond growth rates due to cyclic loading is also described. In addition, XPS studies are presented to characterize the debond path in these layered systems.