scholarly journals Thin-Film Process Technology for Ferroelectric Application

10.5772/54360 ◽  
2012 ◽  
Author(s):  
Koukou Suu
Keyword(s):  
Thin Film ◽  
Process Technology

The application of laser process technology to thin film packaging

1993 ◽  
Vol 16 (1) ◽  
pp. 6-12 ◽  
Author(s):  
T.F. Redmond ◽  
J.R. Lankard ◽  
J.G. Balz ◽  
G.R. Proto ◽  
T.A. Wassick
Keyword(s):  
Thin Film ◽  
Process Technology ◽  
Laser Process

scholarly journals Pentacene Active Channel Layers Prepared by Spin-Coating and Vacuum Evaporation Using Soluble Precursors for OFET Applications

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Shizuyasu Ochiai ◽  
Kumar Palanisamy ◽  
Santhakumar Kannappan ◽  
Paik-Kyun Shin
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Spin Coating ◽  
Dielectric Layer ◽  
Gate Dielectric ◽  
Low Cost ◽  
Vacuum Evaporation ◽  
Large Area ◽  
Process Technology ◽  
Active Channel

Pentacene OFETs of bottom-gate/bottom-contact were fabricated with three types of pentacene organic semiconductors and cross linked Poly(4-vinylphenol) or polycarbonate as gate dielectric layer. Two different processes were used to prepare the pentacene active channel layers: (1) spin-coating on dielectric layer using two different soluble pentacene precursors of SAP and DMP; (2) vacuum evaporation on PC insulator. X-ray diffraction studies revealed coexistence of thin film and bulk phase of pentacene from SAP and thin film phase of pentacene from DMP precursors. The field effect mobility of 0.031 cm2/Vs and threshold voltage of −12.5 V was obtained from OFETs fabricated from SAP precursor, however, the pentacene OFETs from DMP under same preparation yielded high mobility of 0.09 cm2/Vs and threshold value decreased to −5 V. It reflects that the mixed phase films had carrier mobilities inferior to films consisting solely of single phase. For comparison, we have also fabricated pentacene OFETs by vacuum evaporation on polycarbonate as the gate dielectric and obtained charge carrier mobilities as large as 0.62 cm2/Vs and threshold voltage of −8.5 V. We demonstrated that the spin-coated pentacene using soluble pentacene precursors could be alternative process technology for low cost, large area and low temperature fabrication of OFETs.

scholarly journals Effect of a Metal Thin Film's Residual Stress and Manufacturing Process on Thin Film Micro-Crack

2020 ◽  
Vol 58 (3) ◽  
pp. 175-181
Author(s):  
Byung-Kyu Cho ◽  
Seung-Chan Hong ◽  
Byung-Sam Kim ◽  
Jae-Kyung Cheon
Keyword(s):  
Thin Film ◽  
Tensile Stress ◽  
Manufacturing Process ◽  
Residual Tensile Stress ◽  
Process Technology ◽  
Chrome Plating ◽  
Touch Sensor ◽  
Micro Cracks ◽  
Thin Film Layer ◽  
Film Layer

In recent automobile trends, the functions of opening and closing the vehicle door are accomplished by touch sensor and smart-phone NFC (Near Field Communication) systems. These convenience features are incorporated into the outdoor handle. However, this function can’t be used when chrome plating is applied to this part for design purposes. To solve the problem of chrome plating, we studied a metal sputtering deposition process technology, which can preserve the metal feeling without interfering with NFC and touch sensor operation. To achieve this interface communication and sensing performance, we developed a surface treatment that can generate micro-cracks in the thin film layer. We also investigated how the door handle manufacturing process affected the shape of the micro-cracks in the thin film. Results showed that the thickness of the thin film and the target power played a crucial role in controlling the residual tensile stress in the thin film, which was one of major factors responsible for generating micro-cracks in the thin film layer. The shape of the micro-cracks in the thin film was affected by the adjacent layers of the thin film, the primer paint and UV top coat. The surface energy of the primer paint and the shear stress produced by the hardening of the UV top coat were found to affect the shape of the micro-cracks. In addition, we found that there was no change in the shape of the micro-cracks with additional heat treatment, if the residual tensile stress was sufficiently relieved by the micro-cracks formed in the thin film. The slits between the micro-cracks in the outdoor handle cover allowed the Capacitance Sensor and NFC to perform.

Handbook of Thin Film Process Technology

2018 ◽  
Author(s):  
Glocker David A ◽  
S Ismat Shah
Keyword(s):  
Thin Film ◽  
Process Technology

Recent Progress in Thin Film Multichip Packaging for High Temperature Digital Electronics

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000407-000412
Author(s):  
Kun Fang ◽  
Tami Isaacs-Smith ◽  
R. Wayne Johnson ◽  
Alexey Vert ◽  
Tan Zhang ◽  
...  
Keyword(s):  
Thin Film ◽  
High Temperature ◽  
Coefficient Of Thermal Expansion ◽  
Chemical Vapor ◽  
Digital Circuit ◽  
Film Material ◽  
Active Components ◽  
Process Technology ◽  
Au Stud Bump ◽  
The Difference

A thin film material and process technology is being developed and evaluated for high temperature (300°C) digital multichip modules for use in geothermal well instrumentation. The substrate technology selected is AlN to minimize the difference in the coefficient of thermal expansion between the substrate and the SiC digital die. A thin film/plated Ti/Ti:W/Au metallization is used with a plasma enhanced chemical vapor deposited Si3N4 to create multilayer interconnections. Active components are assembled to the interconnect substrate using Au stud bump thermocompression bonding. The Au stud bump maintains a monometallic interface between the substrate Au pad surface and the Au pads on the SiC die. A digital circuit has been built and successfully tested as an initial demonstration.

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