scholarly journals Modelling, Design, and Performance Comparison of Triple Gate Cylindrical and Partially Cylindrical FinFETs for Low-Power Applications

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Sanjeev Rai ◽  
Jyotsna Sahu ◽  
Wanjul Dattatray ◽  
R. A. Mishra ◽  
Sudarshan Tiwari
Keyword(s):  
Side Wall ◽  
Propagation Delay ◽  
Performance Comparison ◽  
Cmos Inverter ◽  
Short Channel ◽  
Wall Area ◽  
Region I ◽  
Channel Effects ◽  
In Series ◽  
And Performance

The FinFETs recently have been the rallying point for the engineers as far as the development of the technology is concerned. The authors here have tried successfully to compare the performance of 30 nm conventional triple gate (Conv) FinFET structure with that of partially cylindrical (PC) FinFET. In PC-FinFET the fin is divided into two regions. Region I is partially cylindrical and has curvature of half of the fin width, and Region II is like a conventional FinFET (having flat region). The results show that there is considerable improvement in Ion, Ioff, and subsequent suppression of short channel effects, that is, subthreshold slope, DIBL, self heating effect, and so forth. The improvement has also been felt in series resistance in PC-FinFET as compared to C-FinFET. It is noteworthy also to mention that in PC-FinFET the corner of fin is rounded thus reducing the side wall area which further reduces the gate capacitance reducing the intrinsic delay. The DC and transient analysis of CMOS inverter using C-FinFET and PC-FinFET have been done which shows that PC-FinFET inverter has reduced propagation delay as compared to C-FinFET.

Comparative Performance Analysis of Nanowire and Nanotube Field Effect Transistors

2021 ◽  
pp. 54-70
Author(s):  
Raj Kumar ◽  
Shashi Bala ◽  
Arvind Kumar
Keyword(s):  
Performance Analysis ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Ballistic Transport ◽  
High Mobility ◽  
Short Channel Effects ◽  
Short Channel ◽  
Comparative Performance ◽  
Channel Effects ◽  
And Performance

To have enhanced drive current and diminish short channel effects, planer MOS transistors have migrated from single-gate devices to three-dimensional multi-gate MOSFETs. The gate-all-around nanowire field-effect transistor (GAA NWFET) and nanotube or double gate-all-around field-effect transistors (DGGA-NTFET) have been proposed to deal with short channel effects and performance relates issues. Nanowire and nanotube-based field-effect transistors can be considered as leading candidates for nanoscale devices due to their superior electrostatic controllability, and ballistic transport properties. In this work, the performance of GAA NWFETs and DGAA-NT FETs will be analyzed and compared. III-V semiconductor materials as a channel will also be employed due to their high mobility over silicon. Performance analysis of junctionless nanowire and nanotube FETs will also be compared and presented.

Examining the Short Channel Characteristic and Performance of Triple Material Double Gate Silicon-on-Nothing Metal Oxide Semiconductor Field Effect Transistors with Grading Channel Concentration

2019 ◽  
Vol 14 (12) ◽  
pp. 1672-1679 ◽  
Author(s):  
Ningombam Ajit Kumar ◽  
Aheibam Dinamani Singh ◽  
Nameirakpam Basanta Singh
Keyword(s):  
Surface Potential ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Double Gate ◽  
Short Channel Effects ◽  
Parabolic Approximation ◽  
Short Channel ◽  
Channel Characteristic ◽  
Channel Effects ◽  
And Performance

A 2D surface potential analytical model of a channel with graded channel triple material double gate (GCTMDG) Silicon-on-Nothing (SON) MOSFET is proposed by intermixing the benefits of triple material in gate engineering and graded doping in the channel. The surface potential distribution function of the GCTMDG SON MOSFET is obtained by solving the Poisson's equation, applying suitable boundary conditions, and using a parabolic approximation method. It is seen in the proposed device that the Short Channel Effects (SCEs) are subdued due to the apprehensible step in the surface potential profile that screen the potential of the drain. The effects of the various device parameters are studied to check the merit of the device. For the validation of the proposed device, it is compared with the simulated results of ATLASTM, a device simulator from SILVACO.

Enhanced Activation of Standard and Cocktail Spike Annealed Junctions with Additional Sub-melt Laser Anneal

2006 ◽  
Vol 912 ◽  
Author(s):  
Simone Severi ◽  
Emmanuel Augendre ◽  
Bartek Pawlak ◽  
Pierre Eyben ◽  
Taiji Noda ◽  
...  
Keyword(s):  
Performance Improvement ◽  
Laser Annealing ◽  
Short Channel Effects ◽  
Short Channel ◽  
Spacer Length ◽  
Partial Dissolution ◽  
Channel Effects ◽  
Laser Anneal ◽  
And Performance ◽  
Nmos Transistors

AbstractThe advantages of fluorine co-implantation on reducing the deep P junction profile is investigated and commented as a possible valuable solution for further scaling of the NMOS transistors spacer length. On PMOS transistors, Ge+C+B cocktail junctions lead to improved short channel effects control, S/D resistance and performance over the conventional approaches. Additional laser annealing induces a partial dissolution of the doping clusters in the junction and lower the S/D transistors resistance. A performance improvement is demonstrated both for NMOS and PMOS with cocktail junctions activated by spike RTA and additional laser annealing.

scholarly journals Leakage Current Analysis of 6T & 7T-SRAM using FINFETs at 22nm Technology

2019 ◽  
Vol 8 (12) ◽  
pp. 2983-2986
Keyword(s):  
Memory Cell ◽  
Leakage Power ◽  
Short Channel Effects ◽  
Mos Transistors ◽  
Current Analysis ◽  
Leakage Currents ◽  
Short Channel ◽  
Channel Effects ◽  
Package Density ◽  
And Performance

Persistent scaling of planar MOSFET results in increase in transistor package density and performance of chip. However at nanometer regime , it has become a very challenging issue due to the increase in the short channel effects. In nanoscaled MOSFETs, the channel loses control from gate terminal due to potential at drain. Due to this, it is difficult to turn off MOSFET completely which inturn leads to leakage currents. Since cache memory occupies more area of processors, it is difficult to reduce leakage power in microprocessors. Double gate transistors have become replacement for MOS transistors at nano level. Since FINFETs have double gates, the leakage currents can be controlled effectively than planar MOSFET. In this paper, leakage currents of 6T & 7T-SRAM memory cell are analyzed using FINFETs at 22nm technology in hspice software

scholarly journals QUANTUM SIMULATIONS OF DUAL GATE MOSFET DEVICES: BUILDING AND DEPLOYING COMMUNITY NANOTECHNOLOGY SOFTWARE TOOLS ON NANOHUB.ORG

2007 ◽  
Vol 17 (03) ◽  
pp. 485-494 ◽  
Author(s):  
SHAIKH AHMED ◽  
GERHARD KLIMECK ◽  
DERRICK KEARNEY ◽  
MICHAEL MCLENNAN ◽  
M. P. ANANTRAM
Keyword(s):  
High Performance ◽  
Short Channel ◽  
Web Based ◽  
Simulation Tools ◽  
Channel Effects ◽  
Dual Gate ◽  
Quantum Mechanical Effects ◽  
And Performance ◽  
Device Properties ◽  
The Impact

Undesirable short-channel effects associated with the relentless downscaling of conventional CMOS devices have led to the emergence of new classes of MOSFETs. This has led to new and unprecedented challenges in computational nanoelectronics. The device sizes have already reached the level of tens of nanometers where quantum nature of charge-carriers dominates the device operation and performance. The goal of this paper is to describe an on-going initiative on nanoHUB.org to provide new models, algorithms, approaches, and a comprehensive suite of freely-available web-based simulation tools for nanoscale devices with capabilities not yet available commercially. Three software packages nanoFET, nanoMOS and QuaMC are benchmarked in the simulation of a widely-studied high-performance novel MOSFET device. The impact of quantum mechanical effects on the device properties is elucidated and key design issues are suggested.

Monte Carlo study of 50 nm-long single and dual-gate MODFETs: suppression of short-channel effects

1993 ◽  
Vol 3 (9) ◽  
pp. 1719-1728
Author(s):  
P. Dollfus ◽  
P. Hesto ◽  
S. Galdin ◽  
C. Brisset
Keyword(s):  
Monte Carlo ◽  
Monte Carlo Study ◽  
Short Channel Effects ◽  
Short Channel ◽  
Channel Effects ◽  
Dual Gate
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