A Simple Method for Thermal Characterization of Stacked Die Electronic Packages in Staggered Arrangement

2018 ◽  
Vol 15 (3) ◽  
pp. 117-125 ◽  
Author(s):  
Bharath R. Bharadwaj ◽  
SriNithish Kandagadla ◽  
Praveen J. Nadkarni ◽  
V. Krishna ◽  
T. R. Seetharam ◽  
...  
Keyword(s):  
Heat Dissipation ◽  
Superposition Principle ◽  
Thermal Characterization ◽  
Electronic Packages ◽  
Heat Sources ◽  
Linear Superposition ◽  
Simple Method ◽  
Ansys Simulation ◽  
Staggered Arrangement

Abstract The need for compactness and efficiency of processing devices has kept increasing rapidly over the past few years. This need for compactness has driven the dice to be stacked one above the other. But with this come the difficulty of heat dissipation and its characterization because there are multiple heat sources and a single effective heat-conductive path. Hence, it becomes important to know the distribution and characterization of heat and temperature to provide effective cooling systems. In this article, we discuss the temperature distribution of various power configurations on stacked dice with five dice, when the dice are in staggered arrangement. The simulations have been carried out for both free convection and forced convection conditions using the ANSYS commercial software. The linear Superposition principle (LSP) is demonstrated on these configurations and validated with the results obtained from ANSYS simulation. LSP can be applied for the quick estimation of die temperatures with negligible error.

Impact of On-Die Discrete Heating on Thermal Performance Characteristics of Silicon Based IC Electronic Packages

1999 ◽  
Author(s):  
V. H. Adams ◽  
K. Ramakrishna
Keyword(s):  
Heat Source ◽  
Heat Generation ◽  
Thermal Characterization ◽  
Electronic Packages ◽  
Heat Sources ◽  
Discrete Heat Sources ◽  
Uniform Heat ◽  
On Chip ◽  
Silicon Based

Abstract Simulations for thermal characterization of electronic packages for silicon-based integrated circuit (IC) components typically assume one of the two uniform heat generation conditions. They are: (1) an isoflux condition in which heat generation is uniformly distributed over the active surface of the die, or (2) a uniform heat generation over the entire (or active) volume of the die. The use of these models may be justified due to high thermal conductivity of silicon, size of the devices on the die, and their relatively uniform spatial distribution over the entire surface of the die in the traditional silicon technologies. However, the current and future technologies are migrating towards embedded systems solutions, such as system-on-chip, and in traditional applications devices are brought in close proximity to each other for improved on-chip electrical performance. These trends result in localized regions of power dissipation on the die that would invalidate the use of traditional uniform generation models in the thermal characterization. The present study examines the effect of discrete heat sources (as opposed to uniformly distributed sources) on the die on thermal performance and characterization of the electronic packages. For this purpose, a conjugate heat transfer problem of a memory chip in a 119 I/O flip chip ceramic and plastic ball grid array (FC-C & PBGA) package under natural and forced convection conditions. First the model is validated against experimentally measured thermal data on a 119 I/O FC-C & P BGA daisy-chain test packages with a thermal test die with uniformly distributed resistive heat source. Junction-to-ambient temperature difference predictions from the simulations are within 10% of the measurements for the uniform heating case. The validated model is then suitably modified to account for discrete heat sources and actual substrates. Results from the discrete heat sources study show a 15–20% increase in predicted junction-to-ambient temperature difference and a larger (a 10–15 °C) temperature variation across the active face of the die than for with a uniform heat source. These results call for the use of discrete heat sources in the thermal characterization of new generation of embedded silicon technologies. They also point to the need for development of test die and characterization methodologies for these technologies with discrete heat sources.

scholarly journals Optical and Thermal Analysis of Secondary Optics in Light Emitting Diodes’ Packaging: Analysis of MR16 Lamp

2021 ◽  
Vol 2116 (1) ◽  
pp. 012121
Author(s):  
Mohammad Azarifar ◽  
Ceren Cengiz ◽  
Mehmet Arik
Keyword(s):  
Heat Dissipation ◽  
Light Emitting Diodes ◽  
Thermal Characterization ◽  
Thermal Control ◽  
Light Extraction Efficiency ◽  
Thickness Effect ◽  
Package Design ◽  
Light Emitting

Abstract Optical and thermal control are two main factors in package design process of lighting products, specifically light emitting diodes (LEDs). This research is aimed to study the role of secondary optics in opto-thermal characterization of LED packages. Novel thin total internal reflection (TIR) multifaceted reflector (MR) lens is modelled and optimized in Monte-Carlo ray-tracing simulations for MR16 package, regarded as one of the widely used LED lighting products. With criteria of designing an optical lens with 50% reduced thickness in comparison to commercially available lenses utilized in MR16 packages, nearly same light extraction efficiency and more uniform beam angles are achieved. Optical performance of the new lens is compared with the experimental results of the MR16 lamp with conventional lens. Only 2.3% reduction in maximum light intensity is obtained while lens size reduction was more than 25%. Based on the detailed CAD design, heat transfer simulations are performed comparing the lens thickness effect on heat dissipation of MR16 lamp. It was observed that using thinner lenses can reduce the lens and chip temperature, which can result in improved light quality and lifetime of both lens and light source.

Thermal Characterization of Electronic Packages Using a Three-Dimensional Fourier Series Solution

2000 ◽  
Vol 122 (3) ◽  
pp. 233-239 ◽  
Author(s):  
J. R. Culham ◽  
M. M. Yovanovich ◽  
T. F. Lemczyk
Keyword(s):  
Fourier Series ◽  
Boundary Conditions ◽  
Series Solution ◽  
Analytical Approach ◽  
Printed Circuit Boards ◽  
Three Dimensional ◽  
Thermal Characterization ◽  
Steady State Solution ◽  
Electronic Packages

The need to accurately predict component junction temperatures on fully operational printed circuit boards can lead to complex and time consuming simulations if component details are to be adequately resolved. An analytical approach for characterizing electronic packages is presented, based on the steady-state solution of the Laplace equation for general rectangular geometries, where boundary conditions are uniformly specified over specific regions of the package. The basis of the solution is a general three-dimensional Fourier series solution which satisfies the conduction equation within each layer of the package. The application of boundary conditions at the fluid-solid, package-board and layer-layer interfaces provides a means for obtaining a unique analytical solution for complex IC packages. Comparisons are made with published experimental data for both a plastic quad flat package and a multichip module to demonstrate that an analytical approach can offer an accurate and efficient solution procedure for the thermal characterization of electronic packages. [S1043-7398(00)01403-1]

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