scholarly journals Alignment System and Application for a Micro/Nanofluidic Chip

Micromachines ◽  
2018 ◽  
Vol 9 (12) ◽  
pp. 621 ◽  
Author(s):  
Junyao Wang ◽  
Lu-lu Han ◽  
Ye-ming Sun ◽  
Tian-yi Su
Keyword(s):  
Enrichment Factor ◽  
Low Cost ◽  
Fluorescein Isothiocyanate ◽  
Assembly Method ◽  
Vacuum Device ◽  
Alignment System ◽  
Bonding Technology ◽  
Nanofluidic Chip

In this paper, a direct pre-bonding technology after alignment of the chip is presented to avoid the post-misalignment problem caused by the transferring process from an alignment platform to a heating oven. An alignment system with a high integration level including a microscope device, a vacuum device, and an alignment device is investigated. To align the chip, a method of ‘fixing a chip with microchannels and moving a chip with nanochannels’ is adopted based on the alignment system. With the alignment system and the assembly method, the micro/nanofluidic chip was manufactured with little time and low cost. Furthermore, to verify the performance of the chip and then confirm the practicability of the device, an ion enrichment experiment is carried out. The results demonstrate that the concentration of fluorescein isothiocyanate (FITC) reaches an enrichment value of around 5 μM and the highest enrichment factor is about 500-fold. Compared with other devices, an alignment system presented in this paper has the advantages of direct pre-bonding and high integration level.

Smart‐Cut® : The Basic Fabrication Process for Unibond® Soi Wafers

1996 ◽  
Vol 446 ◽  
Author(s):  
A.J. Auberton‐Hervé ◽  
T. Barge ◽  
F. Metral ◽  
M. Bruel ◽  
B. Aspar ◽  
...  
Keyword(s):  
Wafer Bonding ◽  
Low Cost ◽  
Bulk Silicon ◽  
High Quality ◽  
Thin Film Thickness ◽  
Hydrogen Implantation ◽  
Electric Behavior ◽  
Bonding Technology ◽  
Good Uniformity ◽  
Quality Surface

AbstractThe advantage of SOI wafers for device manufacture has been widely studied. To be a real challenger to bulk silicon, SOI producers have to offer SOI wafers in large volume and at low cost. The new Smart‐Cut® SOI process used for the manufacture of the Unibond® SOI wafers answers most of the SOI wafer manufacturability issues. The use of Hydrogen implantation and wafer bonding technology is the best combination to get good uniformity and high quality for both the SOI and buried oxide layer. In this paper, the Smart‐Cut® process is described in detail and material characteristics of Unibond® wafers such as crystalline quality, surface roughness, thin film thickness homogeneity, and electric behavior.

scholarly journals Immunoassays Based on Hot Electron-Induced Electrochemiluminescence at Disposable Cell Chips with Printed Electrodes

Sensors ◽  
2019 ◽  
Vol 19 (12) ◽  
pp. 2751
Author(s):  
Päivi Grönroos ◽  
Nur-E-Habiba ◽  
Kalle Salminen ◽  
Marja Nissinen ◽  
Tomi Tuomaala ◽  
...  
Keyword(s):  
Counter Electrode ◽  
Low Cost ◽  
Composite Layer ◽  
Fluorescein Isothiocyanate ◽  
Silver Layer ◽  
Hot Electron ◽  
Counter Electrodes ◽  
Reactive Protein ◽  
Manufacturing Techniques ◽  
Bioaffinity Assays

Novel hot electron-emitting working electrodes and conventional counter electrodes were created by screen printing. Thus, low-cost disposable electrode chips for bioaffinity assays were produced to replace our older expensive electrode chips manufactured by manufacturing techniques of electronics from silicon or on glass chips. The present chips were created by printing as follows: (i) silver lines provided the electronic contacts, counter electrode and the bottom of the working electrode and counter electrode, (ii) the composite layer was printed on appropriate parts of the silver layer, and (iii) finally a hydrophobic ring was added to produce the electrochemical cell boundaries. The applicability of these electrode chips in bioaffinity assays was demonstrated by an immunoassay of human C-reactive protein (i) using Tb(III) chelate label displaying long-lived hot electron-induced electrochemiluminescence (HECL) and (ii) now for the first time fluorescein isothiocyanate (FITC) was utilized as an a low-cost organic label displaying a short-lived HECL in a real-world bioaffinity assay.

SiP(System in Package) Solutions with Wafer Level Packaging Technology

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 002226-002253 ◽  
Author(s):  
In Soo Kang ◽  
Jong Heon (Jay) Kim
Keyword(s):  
Embedded System ◽  
High Performance ◽  
Low Cost ◽  
Wafer Level ◽  
Molding Compound ◽  
Wafer Level Packaging ◽  
Ic Packaging ◽  
Chip Size ◽  
Bonding Technology ◽  
Small Form Factor

In mobile application, the WLP technology has been developing to make whole package size almost same as chip size. However, the I/O per chip unit area has increased so that it gets difficult to realize ideal pad pitch for better reliability. Recently, to achieve the thin and small size, high performance and low cost semiconductor package, Embedding Die and Fanout Technologies have been suggested and developed based on wafer level processing. In this work, as a solution of system in package, wafer level embedded package and fanout technology will be reviewed. Firstly, Wafer level embedded System in Package (WL-eSiP) which has daughter chip (small chip) embedded inside mother chip (bigger chip) without any special substrate has been suggested and developed. To realize wafer level embedded system in package (WL-eSiP), wafer level based new processes like wafer level molding for underfilling and encapsulation by molding compound without any special substrate have been applied and developed, including high aspect ratio Cu bumping, mold thinning and chip-to-wafer flipchip bonding. Secondly, Fan-out Package is considered as alternative package structure which means merged package structure of WLCSP (wafer level chip size package) and PCB process. We can make IC packaging widen area for SIP(System in Package) or 3D package. In addition, TSV and IPD are key enabling technology to meet market demands because TSV interconnection can provide wider bandwidth and high transmission speed due to vertical one compared to wire bonding technology and IPD can provide higher performance, more area saving to be assembled and small form factor compared to discrete passive components.

Diode Laser Bonding of Planar MEMS, MOEMS, & Microfluidic Devices

2005 ◽  
Vol 872 ◽  
Author(s):  
Jie-Wei Chen ◽  
Jerry Zybko ◽  
James Clements
Keyword(s):  
Diode Laser ◽  
Low Cost ◽  
New Technology ◽  
Microfluidic Devices ◽  
High Volume ◽  
Process Characteristics ◽  
Alignment System ◽  
Laser Bonding ◽  
Plastic Parts ◽  
Automated Alignment

AbstractThe assembly of plastic microfluidic devices, MOEMS and microarrays requiring high positioning and welding accuracy in the micrometer range, has been successfully achieved using a new technology based on laser transmission welding combined with a photolithographic mask technique. This paper reviews a laser assembly platform for the joining of microfluidic plastic parts with its main related process characteristics and its potential for low-cost and high volume manufacturing. The system consists of a of diode laser with a mask and an automated alignment function to generate micro welding seams with freely definable geometries. A fully automated mask alignment system with a resolution of < 2 μm and a precise, non-contact energy input allows a fast welding of micro structured plastic parts with high reproducibility and excellent welding quality.

scholarly journals Controllable fabrication of ultrathin free-standing graphene films

2014 ◽  
Vol 372 (2013) ◽  
pp. 20130017 ◽  
Author(s):  
Jianyi Chen ◽  
Yunlong Guo ◽  
Liping Huang ◽  
Yunzhou Xue ◽  
Dechao Geng ◽  
...  
Keyword(s):  
Graphene Oxide ◽  
Ultrathin Films ◽  
Low Cost ◽  
Free Standing ◽  
Assembly Method ◽  
Graphene Films ◽  
Real World Applications ◽  
Optical And Mechanical Properties ◽  
Controllable Fabrication ◽  
Made In

Graphene free-standing film-like or paper-like materials have attracted great attention due to their intriguing electronic, optical and mechanical properties and potential application in chemical filters, molecular storage and supercapacitors. Although significant progress has been made in fabricating graphene films or paper, there is still no effective method targeting ultrathin free-standing graphene films (UFGFs). Here, we present a modified filtration assembly method to prepare these ultrathin films. With this approach, we have fabricated a series of ultrathin free-standing graphene oxide films and UFGFs, up to 40 mm in diameter, with controllable thickness from micrometre to nanoscale (approx. 40 nm) dimensions. This method can be easily scaled up and the films display excellent optical, electrical and electrochemical properties. The ability to produce UFGFs from graphene oxide with a scalable, low-cost approach should take us a step closer to real-world applications of graphene.

A Low-Cost, Automated Wafer Loading System With Submicron Alignment Accuracy for Nanomanufacturing and Nanometrology Applications

2016 ◽  
Vol 4 (4) ◽  
Author(s):  
Andrew Duenner ◽  
Tsung-Fu Yao ◽  
Bruno De Hoyos ◽  
Marianna Gonzales ◽  
Nathan Riojas ◽  
...  
Keyword(s):  
Degrees Of Freedom ◽  
Low Cost ◽  
Atomic Force ◽  
Total Capital ◽  
Alignment System ◽  
Loading System ◽  
Nanoscale Metrology ◽  
The Voice ◽  
Metrology System ◽  
Three Degrees Of Freedom

This paper introduces a low-cost, automated wafer alignment system capable of submicron wafer positioning repeatability. Accurate wafer alignment is critical in a number of nanomanufacturing and nanometrology applications where it is necessary to be able to overlay patterns between fabrication steps or measure the same spot on a wafer over and over again throughout the manufacturing process. The system presented in this paper was designed to support high-throughput nanoscale metrology where the goal is to be able to rapidly and consistently measure the same features on all the wafers in a wafer carrier without the need for slow and expensive vision-based alignment systems to find and measure the desired features. The wafer alignment system demonstrated in this paper consists of a three-pin passive wafer alignment stage, a voice coil actuated nesting force applicator, a three degrees-of-freedom (DOFs) wafer handling robot, and a wafer cassette. In this system, the wafer handling robot takes a wafer from the wafer cassette and loads it on to the wafer alignment stage. The voice coil actuator is then used to load the wafer against the three pins in the wafer alignment system and align the wafer to an atomic force microscope (AFM)-based metrology system. This simple system is able to achieve a throughput of 60 wafers/h with a positional alignment repeatability of 283 nm in the x-direction, 530 nm in the y-direction, and 398 nm in the z-direction for a total capital cost of less than $1800.

Single-Step UV Nanoimprinting Lithography with Multi-Head Imprinting System and Its Applications

2006 ◽  
Vol 326-328 ◽  
pp. 441-444 ◽  
Author(s):  
Jae Jong Lee ◽  
Seung Woo Lee ◽  
Hyun Taek Cho ◽  
Gee Hong Kim ◽  
Kee Bong Choi
Keyword(s):  
Uv Light ◽  
Low Cost ◽  
Single Step ◽  
Characteristic Functions ◽  
Mercury Lamp ◽  
Head Unit ◽  
Alignment System ◽  
Optical Grating ◽  
Next Generation Lithography ◽  
Nano Imprint

The contact-based nanoimprinting lithography (NIL), such as thermal and/or UV nano-imprint, has been well known as one of the next generation lithography alternatives. Especially, the UV nanoimprinting lithography technology has the advantages in terms of process simplicity, low cost, high replication fidelity, and relatively high throughput. The UV nanoimprinting lithography tool is built with the characteristic functions like a self-alignment wafer stage, a nanoimprinting head unit, an alignment system for multi-layer process, stamp/wafer chucking units, releasing unit, and anti-vibration unit, etc. This UV-NIL tool is comprised of UV light source using mercury lamp, ultra-fine XY stage with nano-level positioning accuracy, and self-adjusting flexure stage. The self-adjusting stage has the capability to control 6- axes positions of wafer-holder. The UV-NIL tool can be used for fabrication of some functional nanostructure-patterns i.e. nanosensor electrodes, optical grating patterns and 70nm rectangle patterns.

scholarly journals Removal of Cu(II) Contamination from Aqueous Solution by Ethylenediamine@β-Zeolite Composite

Molecules ◽  
2021 ◽  
Vol 26 (4) ◽  
pp. 978
Author(s):  
Peng Liu ◽  
Hui Ruan ◽  
Tiantian Li ◽  
Jiaqi Chen ◽  
Fuqiu Ma ◽  
...  
Keyword(s):  
Aqueous Solution ◽  
Environmental Conditions ◽  
Self Assembly ◽  
Low Cost ◽  
Amide Group ◽  
Suitable Candidate ◽  
Removal Process ◽  
Β Zeolite ◽  
Assembly Method ◽  
Zeolite Composite

The low cost β-zeolite and ethylenediamine modified β-zeolite (EDA@β-zeolite) were prepared by self-assembly method and used for Cu(II) removal from contaminated aqueous solution. Removal ability of β-zeolite toward Cu(II) was greatly improved after ethylenediamine (EDA) modification, the removal performance was greatly affected by environmental conditions. XPS results illustrated that the amide group played important role in the removal process by forming complexes with Cu(II). The EDA@β-zeolite showed desirable recycling ability. The finding herein suggested that the proposed composite is a promising and suitable candidate for the removal of Cu(II) from contaminated natural wastewater and aquifer.

A new route for fabricating polymer optical microcavities

Nanoscale ◽  
2019 ◽  
Vol 11 (12) ◽  
pp. 5203-5208 ◽  
Author(s):  
Zhang Zhang ◽  
Ni Yao ◽  
Jing Pan ◽  
Lei Zhang ◽  
Wei Fang ◽  
...  
Keyword(s):  
Self Assembly ◽  
Smooth Surface ◽  
Low Cost ◽  
Optical Microcavities ◽  
Assembly Method

SU-8 microcavities with an ultra-smooth surface and high Q factors are demonstrated by using a simple and low cost self-assembly method.

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