scholarly journals InGaAs FinFETs Directly Integrated on Silicon by Selective Growth in Oxide Cavities

Materials ◽  
2018 ◽  
Vol 12 (1) ◽  
pp. 87 ◽  
Author(s):  
Clarissa Convertino ◽  
Cezar Zota ◽  
Heinz Schmid ◽  
Daniele Caimi ◽  
Marilyne Sousa ◽  
...  

III-V semiconductors are being considered as promising candidates to replace silicon channel for low-power logic and RF applications in advanced technology nodes. InGaAs is particularly suitable as the channel material in n-type metal-oxide-semiconductor field-effect transistors (MOSFETs), due to its high electron mobility. In the present work, we report on InGaAs FinFETs monolithically integrated on silicon substrates. The InGaAs channels are created by metal–organic chemical vapor deposition (MOCVD) epitaxial growth within oxide cavities, a technique referred to as template-assisted selective epitaxy (TASE), which allows for the local integration of different III-V semiconductors on silicon. FinFETs with a gate length down to 20nm are fabricated based on a CMOS-compatible replacement-metal-gate process flow. This includes self-aligned source-drain n+ InGaAs regrown contacts as well as 4 nm source-drain spacers for gate-contacts isolation. The InGaAs material was examined by scanning transmission electron microscopy (STEM) and the epitaxial structures showed good crystal quality. Furthermore, we demonstrate a controlled InGaAs digital etching process to create doped extensions underneath the source-drain spacer regions. We report a device with gate length of 90 nm and fin width of 40 nm showing on-current of 100 µA/µm and subthreshold slope of about 85 mV/dec.

1996 ◽  
Vol 448 ◽  
Author(s):  
Hyeon-Saeg Kim ◽  
S.A. Campbell ◽  
D.C. Gilmer ◽  
D.L. Polla

AbstractSuitable replacement materials for ultrathin SiO2 in deeply scaled MOSFETs such as lattice polarizable films, which have much higher permittivities than SiO2, have bandgaps of only 3.0 to 4.0 eV. Due to these small bandgaps, the reliability of these films as a gate insulator is a serious concern. Ramped voltage, time dependent dielectric breakdown, and capacitance-voltage measurements were done on 190Å layers of TiO2 which were deposited through the metal-organic chemical vapor deposition of titanium tetrakis-isopropoxide. Measurements of the high and low frequency capacitance indicate that virtually no interface states are created during constant current injection stress. The increase in leakage upon electrical stress suggests that uncharged, near-interface states may be created in the TiO2 film near the SiO2 interfacial layer that allow a tunneling current component at low bias.


2004 ◽  
Vol 831 ◽  
Author(s):  
Yoga. N. Saripalli ◽  
X-Q Liu ◽  
D.W. Barlage ◽  
M.A.L. Johnson ◽  
D. Braddock ◽  
...  

ABSTRACTAn effective gate insulator for compound semiconductors has been a challenging goal for the materials research community for nearly 40 years. Recent developments on the epitaxial deposition of complex gate oxides as gate insulators have shown promise with the demonstration of enhancement mode high electron mobility transistors (e-mode HEMTs). In this work, gate oxide epilayers deposited on III-V semiconductors for field effect transistors (III-V MOSFETs) are examined using transmission electron microscopy (TEM) to identify the structure of the oxide/semiconductor interface. The high resolution images of the cross-sectional structures for the first time reveal a crystalline nature of the interface between the oxide and the III-V semiconductor. The composition of the oxide layers are determined by Z-contrast Electron Energy Loss Spectroscopy (EELS). The surface morphology of the FET structures is investigated by atomic force microscopy (AFM) both before and after gate oxide deposition, and the structural results are related to device DC electrical characteristics. With an underlying GaN/InGaN heterojunction grown by metal-organic chemical vapor deposition (MOCVD) on sapphire, the MOSFET devices exhibit the characteristics of a substantially unpinned interface, including the capacity for significant charge accumulation and transconductance at positive gate voltages.


2011 ◽  
Vol 4 (6) ◽  
pp. 064201 ◽  
Author(s):  
Tomonori Nishimura ◽  
Choong Hyun Lee ◽  
Toshiyuki Tabata ◽  
Sheng Kai Wang ◽  
Kosuke Nagashio ◽  
...  

2013 ◽  
Vol 1538 ◽  
pp. 275-280
Author(s):  
S.L. Rugen-Hankey ◽  
V. Barrioz ◽  
A. J. Clayton ◽  
G. Kartopu ◽  
S.J.C. Irvine ◽  
...  

ABSTRACTThin film deposition process and integrated scribing technologies are key to forming large area Cadmium Telluride (CdTe) modules. In this paper, baseline Cd1-xZnxS/CdTe solar cells were deposited by atmospheric-pressure metal organic chemical vapor deposition (AP-MOCVD) onto commercially available ITO coated boro-aluminosilicate glass substrates. Thermally evaporated gold contacts were compared with a screen printed stack of carbon/silver back contacts in order to move towards large area modules. P2 laser scribing parameters have been reported along with a comparison of mechanical and laser scribing process for the scribe lines, using a UV Nd:YAG laser at 355 nm and 532 nm fiber laser.


2017 ◽  
Vol 16 (1) ◽  
pp. 69-74
Author(s):  
Md Iktiham Bin Taher ◽  
Md. Tanvir Hasan

Gallium nitride (GaN) based metal-oxide semiconductor field-effect transistors (MOSFETs) are promising for switching device applications. The doping of n- and p-layers is varied to evaluate the figure of merits of proposed devices with a gate length of 10 nm. Devices are switched from OFF-state (gate voltage, VGS = 0 V) to ON-state (VGS = 1 V) for a fixed drain voltage, VDS = 0.75 V. The device with channel doping of 1×1016 cm-3 and source/drain (S/D) of 1×1020 cm-3 shows good device performance due to better control of gate over channel. The ON-current (ION), OFF-current (IOFF), subthreshold swing (SS), drain induce barrier lowering (DIBL), and delay time are found to be 6.85 mA/μm, 5.15×10-7 A/μm, 87.8 mV/decade, and 100.5 mV/V, 0.035 ps, respectively. These results indicate that GaN-based MOSFETs are very suitable for the logic switching application in nanoscale regime.


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