scholarly journals Device Design Assessment of GaN Merged P-i-N Schottky Diodes

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1550 ◽  
Author(s):  
Yuliang Zhang ◽  
Xing Lu ◽  
Xinbo Zou
Keyword(s):  
Breakdown Voltage ◽  
Computer Aided Design ◽  
Schottky Diodes ◽  
Schottky Contact ◽  
Background Concentration ◽  
Model Parameters ◽  
Design Assessment ◽  
Blocking Voltage ◽  
Aided Design ◽  
Drift Layer

Device characteristics of GaN merged P-i-N Schottky (MPS) diodes were evaluated and studied via two-dimensional technology computer-aided design (TCAD) after calibrating model parameters and critical electrical fields with experimental proven results. The device’s physical dimensions and drift layer concentration were varied to study their influence on the device’s performance. Extending the inter-p-GaN region distance or the Schottky contact portion could enhance the forward conduction capability; however, this leads to compromised electrical field screening effects from neighboring PN junctions, as well as reduced breakdown voltage. By reducing the drift layer background concentration, a higher breakdown voltage was expected for MPSs, as a larger portion of the drift layer itself could be depleted for sustaining vertical reverse voltage. However, lowering the drift layer concentration would also result in a reduction in forward conduction capability. The method and results of this study provide a guideline for designing MPS diodes with target blocking voltage and forward conduction at a low bias.

Demonstration of 13-kV Class Junction Barrier Schottky Diodes in 4H-SiC with Three-Zone Junction Termination Extension

2017 ◽  
Vol 897 ◽  
pp. 451-454 ◽  
Author(s):  
Hidenori Kitai ◽  
Yasuo Hozumi ◽  
Hiromu Shiomi ◽  
Masaki Furumai ◽  
Kazuhiko Omote ◽  
...  
Keyword(s):  
Computer Aided Design ◽  
Schottky Diodes ◽  
Pin Diode ◽  
Current Waveform ◽  
Forward Voltage ◽  
Sharp Drop ◽  
Forward Current ◽  
Blocking Voltage ◽  
Aided Design ◽  
Breakdown Model

The static and dynamic characteristics of 13-kV class 4H-SiC junction barrier Schottky (JBS) diodes with a three-zone junction termination extension (JTE) are presented. Using an anisotropy breakdown model, technology computer-aided design simulation of devices with a three-zone JTE agrees well with the obtained experimental results, correctly predicting a sharp drop in blocking voltage at high JTE acceptor concentrations. The forward voltage of the JBS diode at 75°C and a forward current of 500 mA is reduced to approximately one-ninth by that of 13 series-connected 1000-V Si PiN diodes. This suggests that conduction losses of traditional high-voltage circuits which conventionally use series-connected devices can be drastically reduced by replacing the series-connected devices with a single 13-kV class SiC JBS diode. Moreover, the reverse recovery current waveform of the 13-kV class SiC JBS diode shows that these diodes have lower reverse recovery losses than a 13-kV SiC PiN diode.

scholarly journals Improvement in Turn-Off Loss of the Super Junction IGBT with Separated n-Buffer Layers

Micromachines ◽  
2021 ◽  
Vol 12 (11) ◽  
pp. 1422
Author(s):  
Ki-Yeong Kim ◽  
Joo-Seok Noh ◽  
Tae-Young Yoon ◽  
Jang-Hyun Kim
Keyword(s):  
Breakdown Voltage ◽  
Computer Aided Design ◽  
Buffer Layers ◽  
Simulation Tool ◽  
Electrical Characteristics ◽  
Insulated Gate Bipolar Transistor ◽  
Computer Aided ◽  
Long Time ◽  
Tcad Simulation ◽  
Aided Design

In this study, we propose a super junction insulated-gate bipolar transistor (SJBT) with separated n-buffer layers to solve a relatively long time for carrier annihilation during turn-off. This proposition improves the turn-off characteristic while maintaining similar on-state characteristics and breakdown voltage. The electrical characteristics of the devices were simulated by using the Synopsys Sentaurus technology computer-aided design (TCAD) simulation tool, and we compared the conventional SJBT with SJBT with separated n-buffer layers. The simulation tool result shows that turn-off loss (Eoff) drops by about 7% when on-state voltage (Von) and breakdown voltage (BV) are similar. Von increases by about 0.5% and BV decreases by only about 0.8%.

Sensitivity Analysis Application for Multibody System Synthesis

2013 ◽  
Vol 420 ◽  
pp. 68-73 ◽  
Author(s):  
Alžbeta Sapietová ◽  
Milan Sapieta ◽  
Bohuslav Hyben
Keyword(s):  
Computer Aided Design ◽  
Multibody System ◽  
Simulation Software ◽  
Computational Techniques ◽  
Model Parameters ◽  
Technical Problems ◽  
Analysis Application ◽  
Aided Design ◽  
Short Time ◽  
Operating Regimes

Nowadays computational techniques utilization is essential part of the technical development. Visual form of data acquisition from simulations or solving of technical problems is the most effective approach. In the field of computer-aided design (CAD) 3D graphic visualization is certaintybecause it makes it possible to design a very complicated parts and devices at a short time. Furthermore it enable to trace how these parts behave during operating regimes and make an optimization of required parameters. In this paper the engineering design of gravity orienting part tool for cylindrical bushings will be presented. Each of 3D components was designed in CAD software Pro/ENGINEER and MSC.ADAMS virtual prototype was created in simulation software. Using the tools of parametric analysis for refining model parameters in software MSC.ADAMS optimization of selected design and dynamic parameters of given designed system was carried out.

Optimising the Rectification Ratio of Schottky Diodes in n-SiC and n-Si by TCAD

MRS Advances ◽  
2016 ◽  
Vol 1 (54) ◽  
pp. 3655-3660
Author(s):  
Hiep N. Tran ◽  
Tuan A. Bui ◽  
Geoff K. Reeves ◽  
Patrick W. Leech ◽  
Jim G. Partridge ◽  
...  
Keyword(s):  
Computer Aided Design ◽  
Finite Element Modelling ◽  
Room Temperature ◽  
Schottky Diodes ◽  
State Density ◽  
Insulating Layer ◽  
Forward Current ◽  
Current Voltage ◽  
A Minor ◽  
Aided Design

ABSTRACT Finite element modelling has been used to optimise the current/ voltage (I/V) characteristics of metal/ n-SiC and metal/ n-Si diodes incorporating a thin interfacial layer. The electrical properties of the diodes have been examined in relation to the polytype of SiC (3H, 4H or 6C), the doping level, NA, (1015 - 1018cm3) of the substrate, the defect state density, Dit and the work function of the Schottky metal, Φm. The modelling by Technology Computer-Aided Design (TCAD) has shown that the presence of an interfacial insulating layer with a thickness of 1.0 nm has reduced the reverse leakage current of the diode by a factor of ∼102 in Si and 1013 (from 10-19 A to 10-6 A) for SiC with only a minor reduction (∼ 0.8 times) in the forward current in SiC. The properties of the diodes have been modelled at room temperature without thermal annealing.

scholarly journals Study of a SiC Trench MOSFET Edge-Termination Structure with a Bottom Protection Well for a High Breakdown Voltage

2020 ◽  
Vol 10 (3) ◽  
pp. 753
Author(s):  
Jee-Hun Jeong ◽  
Ju-Hong Cha ◽  
Goon-Ho Kim ◽  
Sung-Hwan Cho ◽  
Ho-Jun Lee
Keyword(s):  
Breakdown Voltage ◽  
Computer Aided Design ◽  
Surface Region ◽  
Ring Structure ◽  
Oxide Semiconductor ◽  
Cross Sectional ◽  
Edge Termination ◽  
Additional Process ◽  
Aided Design ◽  
Sectional Structure

A novel edge-termination structure for a SiC trench metal–oxide semiconductor field-effect transistor (MOSFET) power device is proposed. The key feature of the proposed structure is a periodically formed SiC trench with a bottom protection well (BPW) implantation region. The trench can be filled with oxide or gate materials. Indeed, it has almost the same cross-sectional structure as the active region of a SiC trench MOSFET. Therefore, there is little or no additional process loads. A conventional floating field ring (FFR) structure utilizes the spreading of the electric field in the periodically depleted surface region formed between a heavily doped equipotential region. On the other hand, in the trenched ring structure, an additional quasi-equipotential region is provided by the BPW region, which enables deeper and wider field-spreading profiles, and less field crowding at the edge region. The two-dimensional Technology Computer Aided Design (2D-TCAD) simulation results show that the proposed trenched ring-edge termination structures have an improved breakdown voltage compared to the conventional floating field ring structure.

scholarly journals Circuit Simulation Considering Electrical Coupling in Monolithic 3D Logics with Junctionless FETs

Micromachines ◽  
2020 ◽  
Vol 11 (10) ◽  
pp. 887
Author(s):  
Tae Jun Ahn ◽  
Yun Seop Yu
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Circuit Simulation ◽  
Electrical Coupling ◽  
Ring Oscillator ◽  
Model Parameters ◽  
Flip Flop ◽  
Circuit Simulator ◽  
Aided Design ◽  
Better Than

The junctionless field-effect transistor (JLFET) compact model using the model parameters extracted from the LETI-UTSOI (version 2.1) model was proposed to perform circuit simulation considering the electrical coupling between the stacked JLFETs of a monolithic 3D integrated circuit (M3DIC) composed of JLFETs (M3DIC-JLFET). We validated the model by extracting the model parameters and comparing the simulation results of the technology computer-aided design and the Synopsys HSPICE circuit simulator. The performance of the M3DIC-JLFET was compared with that of the M3DIC composed of MOSFETs (M3DIC-MOSFET). The performance of a fan-out-3 ring oscillator with M3DIC-JLFET varied by less than 3% compared to that with M3DIC-MOSFET. The performances of ring oscillators of M3DIC-JLFET and M3DIC-MOSFET were almost the same. We simulated the performances of M3DICs such as an inverter, a NAND, a NOR, a 2 × 1 multiplexer, and a D flip-flop. The overall performance of the M3DIC-MOSFET was slightly better than that of the M3DIC-JLFET.

HIGH-VOLTAGE DIAMOND SCHOTTKY RECTIFIERS

2004 ◽  
Vol 14 (03) ◽  
pp. 872-878 ◽  
Author(s):  
W. HUANG ◽  
T. P. CHOW ◽  
J. YANG ◽  
J. E. BUTLER
Keyword(s):  
Breakdown Voltage ◽  
Voltage Drop ◽  
Schottky Diodes ◽  
Pin Diode ◽  
Switching Voltage ◽  
Thermal Limit ◽  
Schottky Rectifiers ◽  
Blocking Voltage ◽  
Schottky Rectifier ◽  
Lateral Structure

In this paper, we simulate and fabricate diamond schottky rectifiers. The growth rate of pure diamond single crystal epitaxial is from 0.5 up to 100μm/hr with boron doping concentration around 1 × 1014 cm -3 to 1 × 1016 cm -3. A "liftoff" technology is used to provide the wafer. Theoretical calculation indicates that the diamond shottky rectifier has a significant lower voltage drop than SiC schottky rectifier and comparable with SiC PiN diode with the blocking voltage higher than 10 kV. A maximum 50 kHz operating frequency at switching voltage 25 kV is shown based on thermal limit. Vertical structure devices with 70μm epi layer achieve 18 A/cm2 at 250°C at 7 V forward drop as shown with a breakdown voltage of only 600 V. A breakdown voltage of 8 kV at 100μm distance is recorded for lateral structure devices without ohmic contact (back to back Schottky diodes), 12.4 kV at 300μm distance.

Computer-aided design assessment of products for end of life separation and material handling

CIRP Annals ◽  
2015 ◽  
Vol 64 (1) ◽  
pp. 185-188 ◽  
Author(s):  
Nikolaos Papakostas ◽  
George Pintzos ◽  
Chris Triantafyllou
Keyword(s):  
End Of Life ◽  
Computer Aided Design ◽  
Material Handling ◽  
Design Assessment ◽  
Computer Aided ◽  
Aided Design

scholarly journals AN EXPLORATORY STUDY ON DESIGN PROCESS IN ARCHITECTURE: PERSPECTIVE OF CREATIVITY

2021 ◽  
Vol 14 (2) ◽  
pp. 346-361
Author(s):  
Shanta Pragyan Dash
Keyword(s):  
Design Process ◽  
Computer Aided Design ◽  
Information Modeling ◽  
Design Assessment ◽  
Phase Sequence ◽  
Building Information ◽  
Augmented Environments ◽  
Design Challenge ◽  
Problem Solving Process ◽  
Aided Design

Any design challenge could be solved by identifying systemic complexity in the issue before following any problem-solving process. Designers approach problems in different forms but historically worked effectively to build a template or phase sequence. The design process can be used by designers virtually in any project which plays a crucial role in designing innovative architectural projects for many architects. Many studies were conducted to analyze, review, compare and recommend several creative approaches to problem management that allow designers to recognize their work and propose new solutions. However, there are not many studies on the stages to follow to undergo a comprehensive design process in architecture. This study aims to review the various stages involved in the design process. Firstly, it addresses the conceptualization phase of design critically examining the creativity and ideation process with creative and strategic thinking. Secondly, it discusses the representation of the design process expressing through storyboards and animatic, computer-aided design and building information modeling, and virtual reality and augmented environments. Thirdly, it discusses design assessment stage where the techniques for assessment of creativity in design and simulation for analyzing users’ perspective is explained. In the conclusions of the paper, a discussion has been made on an inter-relationship between the various stages in the design process and its relevance for a comprehensive understanding of the architectural integrative design process to address any design challenge both as a studio project for architecture students or in live projects by the practicing architects.

scholarly journals Investigation of Electrical Contacts to p-Grid in SiC Power Devices Based on Charge Storage Effect and Dynamic Degradation

Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1723
Author(s):  
Meng Zhang ◽  
Baikui Li ◽  
Mengyuan Hua ◽  
Jin Wei
Keyword(s):  
Ohmic Contact ◽  
Computer Aided Design ◽  
Voltage Drop ◽  
Schottky Contact ◽  
Typical Feature ◽  
Electrical Contacts ◽  
Power Devices ◽  
Forward Voltage Drop ◽  
Dynamic Degradation ◽  
Aided Design

P-grid is a typical feature in power devices to block high off-state voltage. In power devices, the p-grid is routinely coupled to an external electrode with an Ohmic contact, but Schottky contact to the p-grid is also proposed/adopted for certain purposes. This work investigates the role of contact to p-grid in power devices based on the commonly adopted technology computer-aided design (TCAD) device simulations, with the silicon carbide (SiC) junction barrier Schottky (JBS) diode as a case study. The static characteristics of the JBS diode is independent of the nature of the contact to p-grid, including the forward voltage drop (VF) and the breakdown voltage (BV). However, during the switching process, a Schottky contact would cause storage of negative charges in the p-grid, which leads to an increased VF during switching operation. On the contrary, an Ohmic contact provides an effective discharging path for the stored negative charges in the p-grid, which eliminates the dynamic degradation issues. Therefore, the necessity of an Ohmic contact to p-grid in power devices is clarified.

Sign in / Sign up

Export Citation Format

Share Document