scholarly journals Analytical Current–Voltage Modeling and Analysis of the MFIS Gate-All-Around Transistor Featuring Negative-Capacitance

Electronics ◽  
2021 ◽  
Vol 10 (10) ◽  
pp. 1177
Author(s):  
Yeji Kim ◽  
Yoongeun Seon ◽  
Soowon Kim ◽  
Jongmin Kim ◽  
Saemin Bae ◽  
...  

Recently, in accordance with the demand for development of low-power semiconductor devices, a negative capacitance field-effect-transistor (NC-FET) that integrates ferroelectric material into a gate stack and utilizes negative capacitive behavior has been widely investigated. Furthermore, gate-all-around (GAA) architecture to reduce short-channel effect is expected to be applied after Fin-FET technology. In this work, we proposed a compact model describing current–voltage (I–V) relationships of an NC GAA-FET with interface trap effects for the first time, which is a simplified model by taking proper approximation in each operating region. This is a surface potential-based compact model, which is suitable for evaluating the I–V characteristics for each operating region. It was validated that the proposed model shows good agreement with the results of implicit numerical calculations. In addition, by using the proposed model, we explored the electrical properties of the NC GAA-FET by varying the basic design parameters such as ferroelectric thickness (tfe), intermediate insulator thickness (tox), silicon channel radius (R), and interface trap densities (Net).

Micromachines ◽  
2022 ◽  
Vol 13 (1) ◽  
pp. 98
Author(s):  
Eugeny Ryndin ◽  
Natalia Andreeva ◽  
Victor Luchinin

The article presents the results of the development and study of a combined circuitry (compact) model of thin metal oxide films based memristive elements, which makes it possible to simulate both bipolar switching processes and multilevel tuning of the memristor conductivity taking into account the statistical variability of parameters for both device-to-device and cycle-to-cycle switching. The equivalent circuit of the memristive element and the equation system of the proposed model are considered. The software implementation of the model in the MATLAB has been made. The results of modeling static current-voltage characteristics and transient processes during bipolar switching and multilevel turning of the conductivity of memristive elements are obtained. A good agreement between the simulation results and the measured current-voltage characteristics of memristors based on TiOx films (30 nm) and bilayer TiO2/Al2O3 structures (60 nm/5 nm) is demonstrated.


Electronics ◽  
2019 ◽  
Vol 8 (9) ◽  
pp. 988
Author(s):  
Seon ◽  
Kim ◽  
Kim ◽  
Jeon

Poly-crystalline silicon channel transistors have been used as a display TFT for a long time and have recently been used in a 3D vertical NAND Flash which is a transistor with 2D plane NAND upright. In addition, multi-gate transistors such as FinFETs and a gate-all-around (GAA) structure has been used to suppress the short-channel effects for logic/analog and memory applications. Compact models for poly-crystalline silicon (poly-silicon) channel planar TFTs and single crystalline silicon channel GAA MOSFETs have been developed separately, however, there are few models consider these two physics at the same time. In this work, we derived new analytical current-voltage model for GAA transistor with poly-silicon channel by considering the cylindrical coordinates and the grain boundary effect. Based on the derived formula, the compact I-V model for various operating regions and threshold voltage was proposed for the first time. The proposed model was compared with the measured data and good agreements were observed.


Author(s):  
Hind Jaafar ◽  
Abdellah Aouaj ◽  
Benjamin Iñiguez

A compact model for dual-material gate graded-channel and dual-oxide<br />thickness with two dielectric constant different cylindrical gate (DMG-GC-<br />DOTTDCD) MOSFET was investigated in terms of transconductance, drain<br />conductance and capacitance. Short channel effects are modeled with simple<br />expressions, and incorporated into the core of the model (at the drain<br />current). The design effectiveness of DMG-GC-DOTTDCD was monitored<br />in comparing with the DMG-GC-DOT transistor, the effect of variations of<br />technology parameters, was presented in terms of gate polarization and drain<br />polarization. The results indicate that the DMG-GC-DOTTDCD devices<br />have characteristics higher than the DMG-GC-DOT MOSFET. To validate<br />the proposed model, we used the results obtained from the simulation of the<br />device with the SILVACO-ATLAS-TCAD software.


Author(s):  
Mohsen Rostami ◽  
Peyman Naderi ◽  
Abbas Shiri

Purpose The purpose of this paper is to propose a saturable model based on the magnetic equivalent circuit (MEC) for evaluating the electromagnetic performance of the variable area resolver. Design/methodology/approach The equivalent circuit is developed where three different reluctance types are used to calculate permeances based on geometrical approximations. The proposed model typically has two types of equations, including the magnetic and electrical equations. The magnetic and electrical equations are related to the resolver core and the windings, respectively. Applying the well-known trapezoidal method, the magnetic and electrical equations can be simultaneously solved. A nonlinearity of the magnetic equations, the algebraic equations system, which is obtained from Kirchhoff’s laws, should be solved by the Newton-Raphson technique in each step-time. Findings The flexible MEC model, in which the number of flux tubes in different parts of the resolver can be arbitrarily selected, is proposed to analyze the variable reluctance resolver. Besides, the design parameters such as geometrical dimensions, windings arrangement and a number of the rotor saliencies can be chosen as desired. To consider the effect of time harmonics, a new nonlinear function is used for the core magnetization. Furthermore, different winding layouts can be implemented in the model to take space harmonics into account. The model obtained results are compared with the finite element method in terms of accuracy and simulation time. Originality/value Generally, the accuracy of the predictions in the MEC method is dependent on the number of flux tubes; therefore, the flexibility of the proposed MEC model in its capability to choose the desired number of flux paths is the advantage of this work. Moreover, the proposed model can analyze both wound and saliency rotor resolvers by changing the design parameters.


2021 ◽  
Author(s):  
Shalini Chaudhary ◽  
Basudha Dewan ◽  
Chitrakant Sahu ◽  
Menka Yadav

Abstract Here in, we investigated the impact of negative capacitance in PGP-SELBOX NCFET (partial ground plane on a selective buried oxide in negative capacitance FET) over FDSOI. The ferro-electric layer is placed in the gate stack of PGP-SELBOX NCFET to generate the negative capacitance phenomenon. Ferroelectric(FE) materials are similar to dielectric materials but differ in terms of their polarization properties. FE-HFO 2 is used as ferroelectric material due to its sufficient polarization rate with high dielectric capacitance and better reliability. The effect of ferro-electric material parameters like coercive field(E c ) and remnant polarization(P R ) on the capacitance matching of NCFET are analyzed. The simulation results reveal that the R PE factor, which is the ratio of P R to E c , is closely related to better capacitance matching. In addition, the effect of variation in thickness of ferro-electric layer on the average sub-threshold swing(SS) is also explored. The relation between short channel effects ( V th rolloff and DIBL) and thickness of the ferro-electric (t fe ) for PGP-SELBOX NCFET is also analyzed. The simulation results clearly show that PGP-SELBOX NCFET is having reduced SCEs and 10 3 times better II OFF ON ratio over FDSOI NCFET. For optimized value of ferroelectric parameters average SS for proposed device is found as 50 mV/decade at t fe = 5nm which is lesser than FDSOI NCFET ( 56 mV/decade)


2021 ◽  
Vol 118 (10) ◽  
pp. 101903
Author(s):  
Yuh-Chen Lin ◽  
G. Bruce Rayner ◽  
Jorge Cardenas ◽  
Aaron D. Franklin

BIOMATH ◽  
2021 ◽  
Vol 10 (1) ◽  
pp. 2106147
Author(s):  
Debkumar Pal ◽  
D Ghosh ◽  
P K Santra ◽  
G S Mahapatra

This paper presents the current situation and how to minimize its effect in India through a mathematical model of infectious Coronavirus disease (COVID-19). This model consists of six compartments to population classes consisting of susceptible, exposed, home quarantined, government quarantined, infected individuals in treatment, and recovered class. The basic reproduction number is calculated, and the stabilities of the proposed model at the disease-free equilibrium and endemic equilibrium are observed. The next crucial treatment control of the Covid-19 epidemic model is presented in India's situation. An objective function is considered by incorporating the optimal infected individuals and the cost of necessary treatment. Finally, optimal control is achieved that minimizes our anticipated objective function. Numerical observations are presented utilizing MATLAB software to demonstrate the consistency of present-day representation from a realistic standpoint.


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