scholarly journals An Enhancing Fault Current Limitation Hybrid Droop/V-f Control for Grid-Tied Four-Wire Inverters in AC Microgrids

2018 ◽  
Vol 8 (10) ◽  
pp. 1725 ◽  
Author(s):  
Daniel Heredero-Peris ◽  
Cristian Chillón-Antón ◽  
Marc Pagès-Giménez ◽  
Daniel Montesinos-Miracle ◽  
Mikel Santamaría ◽  
...  

Microgrid integration and fault protection in complex network scenarios is a coming challenge to be faced with new strategies and solutions. In this context of increasing complexity, this paper describes two specific overload control strategies for four-wire inverters integrated in low voltage four-wire alternating current (AC) microgrids. The control of grid-tied microgrid inverters has been widely studied in the past and mainly focused on the use of droop control, which hugely constrains the time response during grid-disconnected operation. Taking into account the previous knowledge and experience about this subject, the main contribution of these two proposals regards providing fault current limitation in both operation modes, over-load capability skills in grid-connected operation and sinusoidal short-circuit proof in grid-disconnected operation. In the complex operation scenarios mentioned above, a hybrid combination of AC droop control based on dynamic phasors with varying virtual resistance, and voltage/frequency master voltage control for grid-(dis)connected operation modes are adopted as the mechanism to enhance time response. The two proposals described in the present document are validated by means of simulations using Matlab/Simulink and real experimental results obtained from CENER (The National Renewable Energy Centre) experimental ATENEA four-wire AC microgrid, obtaining time responses in the order of two-three grid cycles for all cases.

2012 ◽  
Vol 260-261 ◽  
pp. 525-531 ◽  
Author(s):  
Salman Badkubi

This paper presents the comprehensive implementation of Distributed Static Series Compensator (DSSC) to limit the fault currents in power systems. This is the first time that the limitation of fault currents with D-FACTS devices is addressed. DSSC is one of the D-FACTS families whichoperate in a similar manner as Static Synchronous Series Compensator (SSSC) but in smaller size, lower price and more capability. The effectiveness of the DSSC in fault current limitation is investigated through the series voltage effect upon the line. The short circuit current limitation strategy presented here exhibited that besides of the power flow control which is carried out by DSSC; it can also perform this additional function. In the following the potency of the DSSC in reduction of instantaneous voltage dip range during fault current limiting mode is clarified. Furthermore, it is disclosed that with performing more DSSC in the power system, the entire system voltage dip will be improved. In order to validate the claims, computer simulations using PSCAD/EMTDC are exploited.


Processes ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 34 ◽  
Author(s):  
Shijie Cui ◽  
Peng Zeng ◽  
Chunhe Song ◽  
Zhongfeng Wang

With the decentralization of the electricity market and the plea for a carbon-neutral ecosystem, more and more distributed generation (DG) has been incorporated in the power distribution grid, which is then known as active distribution network (ADN). The addition of DGs causes numerous control and protection confronts to the traditional distribution network. For instance, two-way power flow, small fault current, persistent fluctuation of generation and demand, and uncertainty of renewable energy sources (RESs). These problems are more challenging when the distribution network hosts many converter-coupled DGs. Hence, the traditional protection schemes and relaying methods are inadequate to protect ADNs against short-circuit faults and disturbances. We propose a robust communication-assisted fault protection technique for safely operating ADNs with high penetration of converter-coupled DGs. The proposed technique is realizable by employing digital relays available in the recent market and it aims to protect low-voltage (LV) ADNs. It also includes secondary protection that can be enabled when the communication facility or protection equipment fails to operate. In addition, this study provides the detail configuration of the digital relay that enables the devised protection technique. Several enhancements are derived, as alternative technique for the traditional overcurrent protection approach, to detect small fault current and high-impedance fault (HIF). A number of simulations are performed with the complete model of a real ADN, in Shenyang, China, employing the PSCAD software platform. Various cases, fault types and locations are considered for verifying the efficacy of the devised technique and the enabling digital relay. The obtained simulation findings verify the proposed protection technique is effective and reliable in protecting ADNs against various fault types that can occur at different locations.


Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1753 ◽  
Author(s):  
Bing Han ◽  
Yonggang Li

The low voltage direct current (LVDC) distribution networks are connected with too many kinds of loads and sources, which makes them prone to failure. Due to the small damping value in the DC lines, the fault signal propagates so fast that the impact current with the wave front of millisecond and the transient voltage pose great challenges for fault detection. Even worse, some faults with small currents are difficult to detect and the communication is out of sync, resulting in protection misoperation. These problems have severely affected the new energy utilization. In view of this, a DC fault current limiter (FCL) composed of inductance, resistance, and power electronic switch was designed in this paper. The rising speed of fault current can be decreased by the series inductance and the peak value of the fault current can be limited by series impedance, thus in this way the running time can be gained for fault detection and protection. For distributed energy access, by deducing the short circuit fault characteristic expression of LVDC distribution network, the feasibility of FCL was verified. Based on the structure of the bridge-type alternating current (AC) current limiter, the structure and parameters of the DC FCL were determined according to the fault ride-through target. Then, a low voltage ride-through strategy based on DC FCL was proposed for the bipolar short-circuit fault of LVDC distribution network. Finally, MATLAB/Simulink simulation was used to verify the rationality of the proposed FCL and its ride-through strategy.


Materials ◽  
2019 ◽  
Vol 12 (13) ◽  
pp. 2166 ◽  
Author(s):  
Andrzej Ksiazkiewicz ◽  
Grzegorz Dombek ◽  
Karol Nowak

Contact resistance is an important maintenance parameter for electromagnetic switches, including low-voltage relays. The flow of significant current through electric contacts may influence the contact surface and thus the value of the electric contact resistance (ECR). The change in ECR is influenced not only by the value of current but also by the current phase. Therefore, the impact of the switching short-circuit current’s phase on the ECR was analyzed in this paper. Significant changes in the resistance after each switching cycle were observed. The ECR decreased significantly after each make operation, and a correlation with current amplitude, total let-through energy, and short-circuit time was not observed.


2021 ◽  
pp. 60-67
Author(s):  
Suman Baghel ◽  
Sanjeev Jarring

Among many renewable energy sources, solar energy is considered one of the most promising resources for large-scale electricity generation. Here propose resistive SFCL if a fault occurs in a simple low voltage (LV) network. To assess the impact of SFCL in the power system under study, the space-time approach is used to evaluate the short-circuit current in force and spurious control strategies are suggested to achieve the goal. The results complement the feasibility of the proposed A-ACO-based rationalization control for transmission activity according to the limiting circuit and fault current analyzer. The second model of the bastard chassis concludes that the chassis with residual current limiting circuit and analyzer reduces the expansion of the residual current and prevents the voltage from dropping to zero, that no artificial and temporal innovation is used as before. Intelligence-based computer procedures further shorten the working time, which also makes the frame more efficient, as the voltage is restored to its typical value in a short time if the test frame is played for 1 second in a MATLAB climate / SIMULINK. The time taken by the ACO algorithm to restore normal operating conditions in the line was 0.197 seconds, 0.206 seconds and 0.27 seconds for LLLG, LLG and LG errors, respectively.


Author(s):  
Vishnu Charan Thippana ◽  
Alivelu Manga Parimi ◽  
Chandram Karri

In this paper, series FACTS devices like Thyristor control series capacitor(TCSC)and Static synchronous series compensator (SSSC) with designed control logic used to reduce the fault current located in LV distribution network at the LV busbar. The electrical distribution network in small and medium scale industries such as steel plants, process and power plants is through low voltage switchgear (LVS) fed from motor control centre (MCC) switchgear through step down transformer of 11kV or 33kV /415V. The designed switchgear in the LV side for these utilities usually is at 50kA. However, the process loads are continuously increasing and sustained with additional feeders with the existing switchgear. Consequently, the fault current at the busbar of the switchgear increases which may require the replacement of entire switchgear to the new design fault current. However, upgrading the existing switchgear is not an economical solution to the industries. Alternatively reducing the fault current at the busbar is feasible. Controller design implemented for reducing the short circuit current with series FACTS devices. A study carried on 800 MW Thermal power plant Ash handling LVS in ETAP and Matlab. It is observed that the results are encouraging to use series FACTS devices effectively in the LVS.


2021 ◽  
Vol 13 (12) ◽  
pp. 6656
Author(s):  
A. Padmaja ◽  
Allusivala Shanmukh ◽  
Siva Subrahmanyam Mendu ◽  
Ramesh Devarapalli ◽  
Javier Serrano González ◽  
...  

The increase in penetration of wind farms operating with doubly fed induction generators (DFIG) results in stability issues such as voltage dips and high short circuit currents in the case of faults. To overcome these issues, and to achieve reliable and sustainable power from an uncertain wind source, fault current limiters (FCL) are incorporated. This work focuses on limiting the short circuit current level and fulfilling the reactive power compensation of a DFIG wind farm using a capacitive bridge fault current limiter (CBFCL). To deliver sustainable wind power to the grid, a fuzzy-based CBFCL is designed for generating optimal reactive power to suppress the instantaneous voltage drop during the fault and in the recovery state. The performance of the proposed fuzzy-based CBFCL is presented under a fault condition to account for real-time conditions. The results show that the proposed fuzzy-based CBFCL offers a more effective solution for overcoming the low voltage ride through (LVRT) problem than a traditional controller.


Author(s):  
Saumen Dhara ◽  
Alok Kumar Shrivastav ◽  
Pradip Kumar Sadhu ◽  
Ankur Ganguly

Short circuit current limitation in distribution system utilities can be an operational approach to improve power quality, since the estimated voltage sag amplitude during faults may be intensely reduced. The application of superconducting fault current limiter (SFCL) is projected here to limit the fault current that occurs in power system. SFCL utilizes superconductors to instantaneously decrease the unanticipated electrical surges that happen on utility distribution and power transmission networks. SFCL considerably decrease the economic burden on the utilities by reducing the wear on circuit breakers and protecting other expensive equipment. The designed SFCL model is used for determining an impedance level of SFCL according to the fault current limitation necessities of different types of the smart grid system. The representation of this paper about to see the optimum resistive value of SFCL for enhancing the transient stability of a power system. The assessment of optimal resistive value of the SFCL connected in series in a transmission line with a conductor throughout a short circuit fault is consistently determined by applying the equal-area criterion supported by power-angle curves. A Simulink based primary model is developed and additionally the simulation results for the projected model are achieved by using MATLAB.


Author(s):  
Xubin Liu ◽  
Xinyu Chen ◽  
Mohammad Shahidehpour ◽  
Canbing Li ◽  
Qiuwei Wu ◽  
...  

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