Two self-test methods applied to an inertial system problem

1975 ◽  
Vol 12 (7) ◽  
pp. 434-437 ◽  
Author(s):  
Alan S. Willsky ◽  
John J. Deyst ◽  
Bard S. Crawford
ACTA IMEKO ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 46
Author(s):  
Eulalia Balestrieri ◽  
Pasquale Daponte ◽  
Luca De Vito ◽  
Francesco Picariello ◽  
Sergio Rapuano ◽  
...  

<p class="Abstract"><span lang="EN-US">Today a very wide range of different applications relies on the Digital to Analog Converters (DACs). Different DAC architectures have been developed in the years and several different specifications exist to quantify their effective performance, essential information to verify the requirement fulfilling and the DAC suitability for the specific application.  As a result, DAC testing has assumed and continues to assume increasing importance. Main testing challenges include the reduction of the test time and cost, the measurement uncertainty computation and facing with the emerging Built-In Self-Test (BIST) solutions. To unambiguously clarify DAC terms, definitions and test methods the IEEE Std. 1658 has been developed and is currently under revision. To highlight the trends and issues also providing useful information for the revision of the standard, the paper presents an overview of the recent research work dealing with the DAC testing.</span></p><p class="Abstract"><span lang="EN-US"> </span></p>


2018 ◽  
Vol 1 (4) ◽  
Author(s):  
Hadi Jahanirad ◽  
Hanieh Karam

FPGA chips have wide applications in nowadays digital systems. Because of fault prone nature of FPGA chips, testing of them is one of the major challenges for designers. Among various test methods, the Built-in Self-Test (BIST) based ones have shown good performance. In this paper, we presented a BIST-based approach to test LUTs as most vulnerable part of FPGA chip. The BIST-based approach is off-line and has been accomplished within two FPGA configurations. Each configurable logic block (CLB) can be tested independently and there is no handshaking among various CLBs' BIST cores. The proposed BIST architecture has been simulated in HSPICE based on 45-nm CMOS technology. Simulation results shown 100% coverage for single stuck at faults along with 19% area overhead due to additional BIST hardware and 25% increase in leakage power.


2011 ◽  
Vol 28 (1) ◽  
pp. 27-38 ◽  
Author(s):  
Yi Lou ◽  
Zhuo Yan ◽  
Fan Zhang ◽  
Paul D. Franzon

2012 ◽  
Vol 214 ◽  
pp. 534-537
Author(s):  
Shu Fang Yu ◽  
Xiao Ping Shi ◽  
Xiu Liang Huang

The instrumentation is a complexity of the whole system composed by many circuit modules. In order to achieve the detection to the entire system, when the overall system design, the designer must design circuits with judge and test methods suitable for a variety of levels in the case of considering to enables various modules carry on the wrong judgment and state test. This will provide the capabilities of intelligent monitoring and detection for the normal operation of the whole system. This paper has briefly introduced the development trends of modern instrumentation, analyzed the classification level of the failure alarm, given the general intelligent failure alarm circuit and self-test circuit, and provided a theoretical basis and practical reference for the studying of intelligent design of the failure alarm in a variety of instrumentation.


2001 ◽  
Vol 120 (5) ◽  
pp. A586-A587
Author(s):  
L BEST ◽  
S JO ◽  
V VANZANTEN ◽  
D HALDANE ◽  
V LOO ◽  
...  

1990 ◽  
Vol 64 (03) ◽  
pp. 478-484 ◽  
Author(s):  
Thomas Exner ◽  
Douglas A Triplett ◽  
David A Taberner ◽  
Margaret A Howard ◽  
E Nigel Harris

SummarySix lyophilized plasma samples were sent to 20 “expert” laboratories for assessment of lupus anticoagulant (LA). Four samples contained pooled LA of graded potency mixed with aged normal plasma. One contained LA plus cephalin phospholipid and one contained a nonspecific venom anticoagulant. Sixteen methods were used overall with some participants using up to 8 methods. Results were scored in regard to the known potencies of LA in the samples and other known induced defects.Activated partial thromboplastin time (APTT) tests used by most participants for preliminary screening were relatively sensitive, but non-specific. Platelet or phospholipid neutralization procedures (PNP) appeared to be sensitive and specific but showed a non-linear response to increased LA content. Kaolin clotting time (KCT) tests showed the most sensitive response to increased LA content but the weaker LA were not scored as abnormal by most laboratories as the samples may have contained platelet fragments. Other commonly used tests such as the tissue thromboplastin inhibition (TTI) test and the dilute Russell’s viper venom test (DRVVT) were carried out somewhat inconsistently. The variability in performance of tests in different laboratories indicates that standardization of methodology is urgently required.Generally it seemed that most clotting tests were “bypassed” by the addition of phospholipid to a known LA-positive sample in apparently direct proportion to their sensitivity. Sample preparation, especially prevention of contamination with activated platelets is a vital preliminary part in the assay of LA.


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