Low-Voltage Interface Technology for CGS TFT-LCD with Low Power Consumption

1999 ◽  
Vol 30 (1) ◽  
pp. 1116 ◽  
Author(s):  
Y. Kubota ◽  
H. Washio ◽  
K. Maeda ◽  
M. Hijikigawa ◽  
S. Yamazaki
2013 ◽  
Vol 596 ◽  
pp. 195-198
Author(s):  
Nobukazu Takai ◽  
Ken Murakami ◽  
Haruo Kobayashi

In this paper, a high frequency ring oscillator with low power consumption is proposed.The proposed ring oscillator is based on GRO by applying boot strap technique. Simulation resultsindicate that the FoM(Power Consumption/Oscillation Frequency) of the proposed ring oscillator isless than that of the conventional ring oscillator.


2013 ◽  
Vol 61 (4) ◽  
pp. 979-988 ◽  
Author(s):  
K. Wawryn ◽  
R. Suszynski

Abstract A low power, low voltage current mode 9 bit pipelined a/d converter and 8 bit self-calibrated d/a converter to interface a DSP system are presented in the paper. The a/d converter is built of 1.5 bit stages with digital error correction logic. The d/a converter is composed of 3 LSBs fine and 5 MSBs coarse current mode converters. The a/d and d/a converters were designed in 0.35 μm technology, then fabricated to verify the proposed concept. The performances of both converters are compared to the performances of known converter structures. The main advantages of the proposed converters are low power consumption and small chip area.


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