Development of Low Power Test Data Compression Techniques for Digital VLSI Circuits

Mr. Mohammad Iliyas; Mrs. Farha Anjum; Dr. Anil Kumar Sharma; Dr. R. Murali Prasad

doi:10.17148/ijarcce.2016.51297

Development of Low Power Test Data Compression Techniques for Digital VLSI Circuits

IJARCCE ◽

10.17148/ijarcce.2016.51297 ◽

2016 ◽

Vol 5 (12) ◽

pp. 423-425 ◽

Cited By ~ 1

Author(s):

Mr. Mohammad Iliyas ◽

Mrs. Farha Anjum ◽

Dr. Anil Kumar Sharma ◽

Dr. R. Murali Prasad

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Vlsi Circuits ◽

Test Data Compression ◽

Power Test ◽

Digital Vlsi ◽

Low Power Test

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Two-stage low power test data compression for digital VLSI circuits

Computers & Electrical Engineering ◽

10.1016/j.compeleceng.2018.07.009 ◽

2018 ◽

Vol 71 ◽

pp. 309-320 ◽

Cited By ~ 2

Author(s):

K. Thilagavathi ◽

S. Sivanantham

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Vlsi Circuits ◽

Test Data Compression ◽

Two Stage ◽

Power Test ◽

Digital Vlsi ◽

Low Power Test

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Low power test data compression based on LFSR reseeding

IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. ◽

10.1109/iccd.2004.1347919 ◽

2004 ◽

Cited By ~ 18

Author(s):

Jinkyu Lee ◽

N.A. Touba

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Power Test ◽

Low Power Test ◽

Lfsr Reseeding

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Low Power Test-Compression for High Test-Quality and Low Test-Data Volume

2011 Asian Test Symposium ◽

10.1109/ats.2011.75 ◽

2011 ◽

Cited By ~ 6

Author(s):

Vasileios Tenentes ◽

Xrysovalantis Kavousianos

Keyword(s):

Low Power ◽

Test Data ◽

Test Quality ◽

Power Test ◽

Test Compression ◽

Low Power Test ◽

Data Volume ◽

High Test

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A Low-Power Enhanced Bitmask-Dictionary Scheme for Test Data Compression

2014 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2014.103 ◽

2014 ◽

Cited By ~ 2

Author(s):

Vahid Janfaza ◽

Payman Behnam ◽

Bahjat Forouzandeh ◽

Bijan Alizadeh

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression

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Efficient Test Data Compression and Low Power Scan Testing in SoCs

ETRI Journal ◽

10.4218/etrij.03.0303.0017 ◽

2003 ◽

Vol 25 (5) ◽

pp. 321-327 ◽

Cited By ~ 1

Author(s):

Jun-Mo Jung ◽

Jong-Wha Chong

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Scan Testing ◽

Efficient Test

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IOC-LP: hybrid test data compression∕decompression scheme for low power testing

IEE Proceedings - Circuits Devices and Systems ◽

10.1049/ip-cds:20050307 ◽

2006 ◽

Vol 153 (4) ◽

pp. 391 ◽

Cited By ~ 1

Author(s):

S. Chun ◽

Y. Kim ◽

M.-H. Yang ◽

S. Kang

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Low Power Testing ◽

Hybrid Test ◽

Power Testing

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Multistage test data compression technique for VLSI circuits

2016 International Conference on Advanced Communication Control and Computing Technologies (ICACCCT) ◽

10.1109/icaccct.2016.7831602 ◽

2016 ◽

Author(s):

Anju Asokan ◽

J.P. Anita

Keyword(s):

Data Compression ◽

Test Data ◽

Vlsi Circuits ◽

Test Data Compression ◽

Compression Technique ◽

Multistage Test

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Low-Power Test Data Application in EDT Environment Through Decompressor Freeze

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2008.923111 ◽

2008 ◽

Vol 27 (7) ◽

pp. 1278-1290 ◽

Cited By ~ 22

Author(s):

Dariusz Czysz ◽

Grzegorz Mrugalski ◽

Janusz Rajski ◽

Jerzy Tyszer

Keyword(s):

Low Power ◽

Test Data ◽

Power Test ◽

Data Application ◽

Low Power Test

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Hybrid Test Data Compression Technique for Low-Power Scan Test Data

2007 International Symposium on Information Technology Convergence (ISITC 2007) ◽

10.1109/isitc.2007.11 ◽

2007 ◽

Cited By ~ 1

Author(s):

Jaehoon Song ◽

Junseop Lee ◽

Byeongjin Kim ◽

Taejin Jung ◽

Hyunbean Yi ◽

...

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Compression Technique ◽

Scan Test ◽

Hybrid Test

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Low-power scan testing and test data compression for system-on-a-chip

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.998630 ◽

2002 ◽

Vol 21 (5) ◽

pp. 597-604 ◽

Cited By ~ 71

Author(s):

A. Chandra ◽

K. Chakrabarty

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Scan Testing ◽

System On A Chip

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