Characterization of “TEMPOS”: A new Tunable Electronic Material with Pores in Oxide on Silicon

2003 ◽  
Vol 792 ◽  
Author(s):  
Dietmar Fink ◽  
Alexander Petrov ◽  
Kurt Hoppe ◽  
Wolfgang R. Fahrner
Keyword(s):  
Electronic Material ◽  
Heavy Ion ◽  
Oxide Interface ◽  
Ion Tracks ◽  
Mos Devices ◽  
Conducting Materials ◽  
Current Voltage ◽  
Novel Structures ◽  
Track Diameter

ABSTRACTRecently etched heavy ion tracks in MOS devices were filled with (semi)conducting materials to enable charge extraction from, or injection into the conducting channel below the Si/oxide interface, respectively. This leads to a family of novel electronic devices that we denoted as “TEMPOS” structures - that acronym stands for “Tunable Electronic Material with Pores in Oxide on Silicon”. In comparison with MOS-FETs, TEMPOS structures have some unique properties due to their additional parameters such as the track diameter, density, and shape, and the material embedded therein and its spatial distribution. This makes these novel structures much more complex, and it eventually leads to higher compactation of the TEMPOS circuits and to unexpected electronic properties. Depending on the choice of these parameters and the working point of these structures, TEMPOS elements can overtake the function of gatable resistors, condensors, photocells, hygrocells, diodes, sensors, and others. This work concentrates on some basic aspects of TEMPOS and gives some corresponding current /voltage relations and equivalent circuits.

ION TRACK-BASED NANOELECTRONICS

2005 ◽  
Vol 04 (05n06) ◽  
pp. 965-973 ◽  
Author(s):  
D. FINK ◽  
A.V. PETROV ◽  
W. R. FAHRNER ◽  
K. HOPPE ◽  
R. M. PAPALEO ◽  
...  
Keyword(s):  
Silicon Oxide ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Light Pressure ◽  
Alcohol Vapor ◽  
Ion Tracks ◽  
Aspect Ratios ◽  
Current Voltage ◽  
Polymer Foils ◽  
Novel Structures

In the last years, concepts have been developed to use etched ion tracks in insulators, such as polymer foils or silicon oxide layers as hosts for nano- and microelectronic structures. Depending on their etching procedure and the thickness of the insulating layer in which they are embedded, such tracks have typical diameters between some 10 nm and a few μm and lengths between some 100 nm and some 10 μm. Due to their extremely high aspect ratios, and due to the possibility to cover very large sample areas, they exceed the potential of nanolithography. In this paper, the strategies of etched ion track manipulation are briefly outlined, that lead to the formation of nanotubules, nanowires, or tubular arrangements of nanoclusters. Examples where nanoelectronic structures are based on single ion tracks, are nanocondensors or sensors for temperature, light, pressure, humidity and/or alcohol vapor. By combination of ion track metallization and conducting track-to-track connections on the foil surface, micromagnets, microtransformers and microcondensors could be formed within polymer foils. Finally, we present our new "TEMPOS" (Tunable Electronic Material with Pores in Oxide on Silicon) concept where nanometric pores, produced by etching of tracks in silicon oxide on silicon wafers, are used as charge extraction (or injection) channels. In comparison with the metal oxide semiconductor field effect transistors (MOS-FETs), the TEMPOS structures have a number of additional parameters (such as the track diameter, density, and shape, and the material embedded therein and its spatial distribution) which makes these novel structures much more complex. This eventually leads to higher compactation of the TEMPOS circuits and to unexpected electronic properties. TEMPOS structures can overtake the function of tunable resistors, condensors, photocells, hygrocells, diodes, sensors, and other elements. As an example, some corresponding current/voltage relations and TEMPOS circuits are presented. In this work we concentrate on TEMPOS structures with fullerene and phthalocyanine. Though not yet verified, TEMPOS structures could, in principle, be scaled down to nanometer sizes.

scholarly journals Heavy-ion RBS characterization of multilayer TiNx-SiO2-Si structures

2020 ◽  
Vol 9 ◽  
pp. 315
Author(s):  
X. Aslanoglou ◽  
E. Evangelou ◽  
N. Konofaos ◽  
Ch. Dimitriades ◽  
E. Kossionides ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Heavy Ion ◽  
Electrical Performance ◽  
Multilayer Structures ◽  
Mos Devices

Multilayer structures consisting of TiNx-SiO2-Si layers operating as MOS devices were constructed and tested for their electrical properties. RBS measurements were performed for the characterization of the structure of the devices. The results show a correlation between the structure found by RBS and the electrical performance of the devices.

Fabrication and Characterization of Copper Oxide Resistive Memory Devices

2011 ◽  
Vol 1337 ◽  
Author(s):  
S.M. Bishop ◽  
B.D. Briggs ◽  
Z.P. Rice ◽  
S. Addepalli ◽  
N.R. McDonald ◽  
...  
Keyword(s):  
Copper Oxide ◽  
Electrical Contact ◽  
Switching Behavior ◽  
Memory Devices ◽  
Plasma Oxidation ◽  
Resistive Memory ◽  
Oxide Interface ◽  
Bipolar Switching ◽  
Current Voltage

ABSTRACTThree synthesis techniques have been explored as routes to produce copper oxide for use in resistive memory devices (RMDs). The major results and their impact on device current-voltage characteristics are summarized. The majority of the devices fabricated from thermally oxidized copper exhibited a diode-like behavior independent of the top electrode. When these devices were etched to form mesa structures, bipolar switching was observed with set voltages <2.5 V, reset voltages <(-1) V and ROFF/RON ∼103-104. Bipolar switching behavior was also observed for devices fabricated from copper oxide synthesized by RT plasma oxidation (ROFF/RON up to 108). Voiding at the copper-copper oxide interface occurred in films produced by thermal and plasma oxidation performed at ≥200°C. The copper oxide synthesized by reactive sputtering had large areas of open volume in the microstructure; this resulted in short circuited devices because of electrical contact between the bottom and top electrodes. The results for fabricating copper oxide into ≤100 nm features are also discussed.

Characterization of swift heavy ion tracks in MoS2 by transmission electron microscopy

2020 ◽  
Vol 29 (10) ◽  
pp. 106103
Author(s):  
Li-Jun Xu ◽  
Peng-Fei Zhai ◽  
Sheng-Xia Zhang ◽  
Jian Zeng ◽  
Pei-Pei Hu ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Heavy Ion ◽  
Ion Tracks ◽  
Swift Heavy Ion ◽  
Transmission Electron

Nanoprobing Applications with Capacitance-Voltage and Pulsed Current-Voltage Measurements for Device Failure Analysis

2015 ◽  
Author(s):  
LiLung Lai ◽  
Nan Li ◽  
Qi Zhang ◽  
Tim Bao ◽  
Robert Newton
Keyword(s):  
Failure Analysis ◽  
High Speed ◽  
Pulsed Current ◽  
Electrical Measurements ◽  
Device Failure ◽  
Mos Devices ◽  
Atomic Force ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Rising Time

Abstract Owing to the advancing progress of electrical measurements using SEM (Scanning Electron Microscope) or AFM (Atomic Force Microscope) based nanoprober systems on nanoscale devices in the modern semiconductor laboratory, we already have the capability to apply DC sweep for quasi-static I-V (Current-Voltage), high speed pulsing waveform for the dynamic I-V, and AC imposed for C-V (Capacitance-Voltage) analysis to the MOS devices. The available frequency is up to 100MHz at the current techniques. The specification of pulsed falling/rising time is around 10-1ns and the measurable capacitance can be available down to 50aF, for the nano-dimension down to 14nm. The mechanisms of dynamic applications are somewhat deeper than quasi-static current-voltage analysis. Regarding the operation, it is complicated for pulsing function but much easy for C-V. The effective FA (Failure Analysis) applications include the detection of resistive gate and analysis for abnormal channel doping issue.

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