GaAs MESFET's on Silicon Substrates for Digital IC Applications

1986 ◽  
Vol 67 ◽  
Author(s):  
Hisashi Shichijo ◽  
Jhang Woo Lee
Keyword(s):  
Threshold Voltage ◽  
Silicon Substrate ◽  
Buffer Layers ◽  
Silicon Substrates ◽  
Device Structure ◽  
Bulk Gaas ◽  
Gaas On Si

ABSTRACTThe characteristics of GaAs MESFETs in GaAs-on-Si have been studied in detail for digital IC applications. The device structure utilizes GaAs and AlGaAs undoped buffer layers grown on a 3 degrees off (100) silicon substrate by MBE. The threshold voltage of the MESFET is adjusted by recessing the gate.The maximum observed transconductance of 135 mS/mm is comparable to what is expected from the bulk GaAs device with the same parameters. The device also shows good pinch-off characteristics. Both enhancement and depletion mode MESFETs have been fabricated.

Effects of Silicon Misorientation Angle on the Rf and Dc Characteristics of GaAs-on-Si Mesfets

1995 ◽  
Vol 379 ◽  
Author(s):  
Christos Papavassiliou ◽  
G. Constantinidis ◽  
N. Kornilios ◽  
A. Georgakilas ◽  
E. LÖchterman ◽  
...  
Keyword(s):  
Misorientation Angle ◽  
Defect Density ◽  
Initial Study ◽  
Buffer Layers ◽  
Silicon Substrates ◽  
Heteroepitaxial Growth ◽  
Mbe Growth ◽  
Gaas Mesfet ◽  
Gaas On Si ◽  
Dc Characteristics

ABSTRACTA systematic experimental investigation has been undertaken for the optimization of the wafer parameters and processing for silicon wafers intended for use as substrates for MBE growth, with emphasis on heteroepitaxial growth of GaAs-on- Si. Within this investigation, results are presented of an initial study focused on the optimization of the magnitude of the misorientation angle towards a <110> direction for the growth of GaAs on (001) Si wafers. This angle controls the structure of the stepped (001)Si surface and can influence the defect density and surface smoothness of the GaAs-on-Si layers. Silicon substrates misoriented from 0 deg. up to 9 deg. were cut to specification and subsequently used for the epitaxial growth of GaAs MESFET structures. MESFETs were fabricated and their dc and RF characteristics compared. The resistivity of the GaAs-on-Si buffer layers was evaluated and correlated to the results from device characterization. This work presents the effects of the magnitude of the angle of misorientation in the range from 0 to 9 deg.

Prospects for GaAs-on-Si LSI Circuits

1987 ◽  
Vol 91 ◽  
Author(s):  
H. Shichijo ◽  
L.T. Tran ◽  
R.J. Matyi ◽  
J.W. Lee
Keyword(s):  
Threshold Voltage ◽  
Large Scale ◽  
Recent Progress ◽  
Ring Oscillators ◽  
Standard Process ◽  
Bulk Gaas ◽  
Gaas On Si ◽  
Recent Success ◽  
Bipolar Devices ◽  
Gaas Devices

ABSTRACTThis paper will review some of the recent progress in GaAs-on-Si devices and circuits, and discuss the issues involved in realizing large scale ICs in GaAs-on-Si wafers. With a recent success in fabricating 1 Kbit static RAMs in GaAs-on-Si wafers, it has become apparent that this material is indeed acceptable for LSI complexity circuits. GaAs MESFETs fabricated using a standard process show an excellent threshold voltage uniformity which is comparable to that for bulk GaAs devices. GaAs bipolar devices on GaAs-on-Si have realized a gain of 25 which is the highest reported for bipolar devices in GaAs-on-Si material. Bipolar ring oscillators and 256-bit ROMs consisting of more than 100 gates have also been realized. In spite of these successes, however, there are numerous issues that need to be solved before this material becomes practical.

c-Axis-tilted ScAlN films grown on silicon substrates for surface acoustic wave devices

2022 ◽  
Author(s):  
Takumi Tominaga ◽  
Shinji Takayanagi ◽  
Takahiko Yanagitani
Keyword(s):  
Acoustic Wave ◽  
Surface Acoustic Wave ◽  
Mobile Networks ◽  
Tilt Angle ◽  
Silicon Substrate ◽  
Electromechanical Coupling ◽  
Rf Magnetron Sputtering ◽  
Electromechanical Coupling Coefficient ◽  
Silicon Substrates ◽  
Device Structure

Abstract ScAlN films are currently being investigated for their potential use in surface acoustic wave (SAW) devices for next-generation mobile networks because of their high piezoelectricity. This paper describes the numerical simulation of SAW propagation in c-axis-tilted ScAlN films on silicon substrates and a fabrication technique for preparing c-axis-tilted ScAlN films on silicon substrates. The electromechanical coupling coefficient K 2 of SAW propagating in the ScAlN film/silicon substrate increased due to the c-axis tilt angle. The maximum K 2 value is approximately 3.90%. This value is 2.6 times the maximum K 2 value of the c-axis-oriented ScAlN film/silicon substrate structure. The c-axis-tilted ScAlN films with an Sc concentration of 40% were prepared on a silicon substrate via RF magnetron sputtering based on the self-shadowing effect, and the maximum c-axis tilt angle was 57.4°. These results indicate that this device structure has potential for SAW device applications with well-established micromachining technology derived from silicon substrates.

Enhancement Mode GaN MOSFETs on Silicon Substrates with High Field-effect Mobility

2008 ◽  
Vol 1068 ◽  
Author(s):  
Hiroshi Kambayashi ◽  
Yuki Niiyama ◽  
Shinya Ootomo ◽  
Takehiko Nomura ◽  
Masayuki Iwami ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Silicon Substrate ◽  
Field Effect ◽  
High Field ◽  
Silicon Substrates ◽  
Field Effect Mobility ◽  
Enhancement Mode

ABSTRACTIn this report, we have demonstrated enhancement-mode n-channel GaN MOSFETs on silicon (111) substrates. We observe a high field-effect mobility of 115 cm2/Vs, the best report for GaN MOSFET fabricated on a silicon substrate to our knowledge. The threshold voltage was estimated to be +2.7 V, and the maximum operation current was over 3.5 A. This value is the largest which have ever been reports.

Investigation of Pt/Si/CeO2/Pt MOS Device Structure by Impedance Spectroscopy

2001 ◽  
Vol 699 ◽  
Author(s):  
Jyrki Lappalainen ◽  
Darja Kek ◽  
Harry L. Tuller
Keyword(s):  
Room Temperature ◽  
Silicon On Insulator ◽  
Buffer Layers ◽  
Silicon Substrates ◽  
Device Structure ◽  
Mos Capacitor ◽  
Thermally Activated ◽  
Potential Applicability ◽  
High Dielectric

AbstractEpitaxial growth of dielectric layers on silicon substrates has attracted a great deal of recent interest given their potential applicability in the fabrication of high quality silicon-on-insulator (SOI) structures, high density capacitor devices, and stable buffer layers between silicon and other materials. Cerium dioxide (CeO2) appears to be a particularly attractive candidate, given its high dielectric constant and its compatibility with Si. To date, measurements of the electrical properties of CeO2 films on Si have been largely limited to room temperature. In this study, thin films of CeO2 were prepared by in situ pulsed laser deposition (PLD) on n-type (100) silicon substrates, with varied deposition conditions. Capacitance-voltage measurements (C-V) were used to characterize the response of the Pt/Si/CeO2/Pt MOS capacitor structure. Impedance measurements were performed from room temperature to 350°C. This enabled the independent characterization of the electrical signature of the Pt/Si interface which was found to contribute insignificantly above approximately 150°C. The CeO2 film conductivity was found to be thermally activated with activation energy of ∼0.45 eV, with its magnitude strongly dependent on film microstructure.

Effects of substrate quality and annealing on defect structures at GaAs/Si interfaces

1987 ◽  
Vol 45 ◽  
pp. 340-341
Author(s):  
H. L. Tsai ◽  
J. W. Lee
Keyword(s):  
Growth Process ◽  
Molecular Beam ◽  
Substrate Surface ◽  
Lattice Misfit ◽  
Device Fabrication ◽  
Silicon Substrates ◽  
Defect Structures ◽  
Gaas Film ◽  
Substrate Quality ◽  
Gaas On Si

Growth of GaAs on Si using epitaxial techniques has been receiving considerable attention for its potential application in device fabrication. However, because of the 4% lattice misfit between GaAs and Si, defect generation at the GaAs/Si interface and its propagation to the top portion of the GaAs film occur during the growth process. The performance of a device fabricated in the GaAs-on-Si film can be degraded because of the presence of these defects. This paper describes a HREM study of the effects of both the substrate surface quality and postannealing on the defect propagation and elimination.The silicon substrates used for this work were 3-4 degrees off [100] orientation. GaAs was grown on the silicon substrate by molecular beam epitaxy (MBE).

scholarly journals Binary Self-Assembly of Nanocolloidal Arrays using Concurrent and Sequential Spin Coating Techniques

Materials ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 274
Author(s):  
Shih-Jyun Shen ◽  
Demei Lee ◽  
Yu-Chen Wu ◽  
Shih-Jung Liu
Keyword(s):  
Silicon Substrate ◽  
Self Assembly ◽  
Spin Coating ◽  
Processing Parameters ◽  
The Self ◽  
Silicon Substrates ◽  
Processing Conditions ◽  
Polystyrene Spheres ◽  
Optimal Processing ◽  
Spin Coater

This paper reports the binary colloid assembly of nanospheres using spin coating techniques. Polystyrene spheres with sizes of 900 and 100 nm were assembled on top of silicon substrates utilizing a spin coater. Two different spin coating processes, namely concurrent and sequential coatings, were employed. For the concurrent spin coating, 900 and 100 nm colloidal nanospheres of latex were first mixed and then simultaneously spin coated onto the silicon substrate. On the other hand, the sequential coating process first created a monolayer of a 900 nm nanosphere array on the silicon substrate, followed by the spin coating of another layer of a 100 nm colloidal array on top of the 900 nm array. The influence of the processing parameters, including the type of surfactant, spin speed, and spin time, on the self-assembly of the binary colloidal array were explored. The empirical outcomes show that by employing the optimal processing conditions, binary colloidal arrays can be achieved by both the concurrent and sequential spin coating processes.

The Effect of Substrate on Continuous Electrohydrodynamic Printing

2013 ◽  
Vol 684 ◽  
pp. 352-356 ◽  
Author(s):  
Ning Bin Bu ◽  
Yong An Huang ◽  
Zhou Ping Yin
Keyword(s):  
Relaxation Time ◽  
Threshold Voltage ◽  
Inkjet Printing ◽  
Silicon Substrate ◽  
Flight Behavior ◽  
Grid Pattern ◽  
Parallel Lines ◽  
Electrohydrodynamic Printing ◽  
The Future

In this paper, the behavior of ejected jet is studied at three different substrates (conductive, semiconductor and dielectric) in continuous electrohydrodynamic inkjet printing mode. Because the polarization charges will accumulate at the surface of the substrate in a short nozzle-to-collector distance, one can observe that the different flight behavior in the space. Results show that the substrate has little effect on the threshold voltage and the relaxation time of the substrate can be used to indicate the behavior of the jet. When the lifetime of the jet is larger than the relaxation time of the substrate, the jet can be deposited on the substrate regularly. Based on this guideline, a designed parallel lines and grid pattern are fabricated with several micrometers on a silicon substrate. These show that the designed pattern could be fabricated in a controllable jet. In the future, this method is able to be utilized to fabricate the mirco/nano-devices.

Fabrication and characteristics of the high-sensitivity humidity sensor of anodic aluminum oxide based on silicon substrates

2018 ◽  
Vol 32 (16) ◽  
pp. 1850199 ◽  
Author(s):  
Degao Lan ◽  
Xiaofeng Zhao ◽  
Fei Wang ◽  
Chunpeng Ai ◽  
Dianzhong Wen ◽  
...  
Keyword(s):  
Aluminum Oxide ◽  
Silicon Substrate ◽  
Anodic Aluminum Oxide ◽  
Nonlinear Response ◽  
Humidity Sensor ◽  
High Sensitivity ◽  
Silicon Substrates ◽  
High Porosity ◽  
Interdigitated Electrodes ◽  
Anodic Aluminum

The humidity sensor based on silicon substrate is presented in this paper, which consists of anodic aluminum oxide (AAO) film and interdigitated electrodes. By using electro-chemical oxidizing technique, AAO film with high porosity is fabricated on the silicon substrate. Under optimal oxidization condition, pore diameter of 37–79 nm and depth about [Formula: see text]m is achieved. Interdigitated electrodes are fabricated on the top of AAO film by vacuum evaporation deposition method. The results show that the sensor has different nonlinear response in whole range of relative humidity (RH). Moreover, it has almost linear relationship between the capacitance and RH at high RH from 75% to 95%. The highest sensitivity is obtained 613 pF/%RH at 1 kHz, which is much higher than other frequencies.

Heteroepitaxial growth of GaAs on Si by MOVPE using a-GaAs/a-Si double-buffer layers

2006 ◽  
Vol 295 (2) ◽  
pp. 103-107 ◽  
Author(s):  
Wu-Yih Uen ◽  
Zhen-Yu Li ◽  
Yen-Chin Huang ◽  
Meng-Chu Chen ◽  
Tsun-Neng Yang ◽  
...  
Keyword(s):  
Buffer Layers ◽  
Heteroepitaxial Growth ◽  
Gaas On Si
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