Characterization of Oxide Etching and Wafer Cleaning using Vapor-Phase Anhydrous HF and Ozone

1997 ◽  
Vol 470 ◽  
Author(s):  
Barbara Froeschle ◽  
Lutz Deutschmann ◽  
Anton J. Bauer ◽  
Edmund P. Burte
Keyword(s):  
Vapor Phase ◽  
Gate Dielectric ◽  
Dielectric Breakdown ◽  
Uv Light ◽  
Reference Sample ◽  
Surface Preparation ◽  
Time Dependent Dielectric Breakdown ◽  
Wafer Cleaning ◽  
Phase Surface ◽  
Cluster Tool

ABSTRACTA cleaning process using anhydrous HF (AHF)/methanol and ozone is carried out in a STEAG-AST Vapor Phase Cleaning module (VPC). This module is integrated in a state-of-the-art cluster tool also consisting of a STEAG-AST Rapid Thermal Oxidation module (RTO). The dependence of AHF vapor phase etch rate of thermally grown silicon dioxide on different process parameters, such as etch time, AHF-flow, and temperature is evaluated. The optimized etch process is found to be at a temperature of 40°C and at a pressure of 50 mbar for this VPC module. Using the above etch parameters various combinations of vapor phase surface preparation chemistries combining AHF etching and ozone/UV cleaning are evaluated.To demonstrate the feasibility of this cluster tool for advanced gate dielectric formation, 4.0 nm thin oxide is grown directly after the cleaning in the RTO module without breaking the vacuum. Time dependent dielectric breakdown results for oxides pre-oxidation-cleaned in AHF, and in AHF followed by ozone are compared to a reference sample without any dry pre-oxidation cleaning. It can be shown, that the cleaning in AHF with a subsequent ozone step at 200°C under UV light leads to improved breakdown characteristics compared to AHF/methanol cleanings without such subsequent ozone/UV step or conventional wet cleaning using HF-Dip.

Cleaning Process Optimization in a Gate Oxide Cluster Tool Using an in-Line XPS Module

1997 ◽  
Vol 477 ◽  
Author(s):  
Barbara Froeschle ◽  
Frédérique Glowacki ◽  
Anton J. Bauer ◽  
Igor Kasko ◽  
Richard Oechsner ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Dielectric Breakdown ◽  
Uv Light ◽  
Reference Sample ◽  
Gate Oxide ◽  
Cleaning Process ◽  
Oxide Cluster ◽  
Time Dependent Dielectric Breakdown ◽  
Wafer Surfaces ◽  
Cluster Tool

ABSTRACTA cleaning process using anhydrous HF (AHF)/methanol and ozone was carried out in a STEAG AST Vapor Phase Cleaning module (VPC). This module was integrated in a state-of-theart cluster tool also consisting of a STEAG AST Rapid Thermal Oxidation module (RTO). To investigate the properties of silicon after cleaning a novel in-line XPS module was integrated into the gate oxide cluster. Measurements of fluorine, carbon, and oxygen contamination in the range from 0.01 to 1 monolayers on cleaned wafer surfaces and on regrown oxides (< 0.5 nm) have been performed and used for rapid optimization of the cleaning procedure. The in-line integration enabled measurements without exposing the wafers to atmosphere thus avoiding oxidation or contamination of the wafer surfaces. To demonstrate the feasibility of this cluster tool for advanced gate dielectric formation, 4.0 nm thin oxide was grown directly after the cleaning in the RTO module without breaking the vacuum. Time dependent dielectric breakdown results for oxides pre-oxidation-cleaned in AHF, and in AHF followed by ozone were compared to a reference sample without any dry pre-oxidation cleaning. It could be shown, that the cleaning in AHF with a subsequent ozone step at 200°C under UV light lead to improved breakdown characteristics compared to AHF/methanol cleanings without such subsequent ozone/UV step or conventional wet cleaning using HF-Dip.

Gate Stack Formation using a Fully Integrated Single Wafer Cluster Tool

1997 ◽  
Vol 470 ◽  
Author(s):  
David C. Frystak ◽  
John Kuehne ◽  
Rick Wise ◽  
Burt Fowler ◽  
Phil Grothe ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Dielectric Breakdown ◽  
Defect Density ◽  
Chemical Vapor ◽  
Breakdown Field ◽  
Fully Integrated ◽  
Low Field ◽  
Yield Values ◽  
Dielectric Charge ◽  
Cluster Tool

ABSTRACTA single wafer gate cluster tool has been evaluated in an effort to quantify the effects of gate clustering on defect density, process capability and device performance. The single wafer gate cluster tool consists of a hydrofluoric vapor (HF-vapor) pre-gate cleanup module, a rapid thermal oxidation (RTO) module and a polysilicon rapid thermal chemical vapor deposition (RTCVD) module. The gate dielectric charge to breakdown (Qbd) of capacitor structures formed using the integrated single wafer gate cluster tool process sequence typically averaged 9.1 to 12.3 coulombs per square centimeter (C/cm2). Excellent gate oxide integrity yield values in the range of 99.8% to 100% were also routinely obtained. The films were free of low field and mid field gate dielectric breakdown events and the devices exhibited dielectric breakdown field strength in excess of fourteen megavolts per centimeter (MV/cm). The cluster tool process was successfully integrated into a transistor device flow. The characteristics of devices formed using the cluster tool process were equivalent to those of devices formed using conventional batch processing at the gate level.

Influence of Surface Preparation Prior to Thermal Nitridation on the Electrical Characteristics of Silicon Nitride Films Deposited on Polycrystalline Silicon Films

1992 ◽  
Vol 284 ◽  
Author(s):  
Viju K. Mathews ◽  
Randhir P.S. Thakur ◽  
Akram Ditali ◽  
Pierre C. Fazan
Keyword(s):  
Silicon Nitride ◽  
Polycrystalline Silicon ◽  
Dielectric Breakdown ◽  
Silicon Film ◽  
Surface Preparation ◽  
Silicon Dioxide Film ◽  
Time Dependent Dielectric Breakdown ◽  
Pre Treatment ◽  
Thermal Nitridation ◽  
Polycrystalline Silicon Films

ABSTRACTRapid thermal nitridation of the polycrystalline silicon film prior to the deposition of the silicon nitride dielectric film has been shown to be very effective in improving the dielectric characteristics for thin films. The changes at the polysilicon-silicon nitride interface has been further investigated using an in-situ clean process. This pre-treatment reduces the oxygen levels at the interface and improves the time dependent dielectric breakdown. The leakage current increases slightly due to the thinning of the silicon dioxide film at the interface.

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