POST‐METALLIZATION ANNEALING OF ULTRA‐THIN REMOTE PLASMA ENHANCED CVD OXIDES

1996 ◽  
Vol 446 ◽  
Author(s):  
L‐Å Ragnarsson ◽  
P. Lundgren ◽  
D. Landheer

AbstractA remote plasma enhanced chemical vapour deposition (RPECVD) process was used to deposit thin silicon dioxides on silicon substrates. The oxide properties were compared with thermal oxides with similar thicknesses (2.5–9 nm) using capacitance‐voltage (C‐V), current‐voltage (I‐V) and constant voltage stress measurements (I‐t). Post‐metallization annealing (PMA) showed different annealing dynamics as compared to the thermal oxides for anneal times below approximately 1000 s (at 260 °C) after which the dynamics were similar. The deposited oxides had a higher initial interface state density (Dit) than the thermal oxides, but after PMA they were found to be of the same quality as the thermal oxides. Positive charging of the deposited oxides during constant voltage stress was the same as for thermal oxides, showing that the stress endurance of the two are similar.

1992 ◽  
Vol 70 (10-11) ◽  
pp. 795-798 ◽  
Author(s):  
D. Landheer ◽  
J. A. Bardwell ◽  
I. Sproule ◽  
J. Scott-Thomas ◽  
W. Kwok ◽  
...  

The interface state density and fixed charge density of films of a-Si3N4:H deposited on silicon substrates by remote microwave plasma chemical vapour deposition have been studied as a function of deposition and annealing temperature. Interface state densities (Dit as low as 9 × 1010 cm−2 eV−1 have been obtained for films deposited at 215 °C and annealed for 15 min at 500 °C. The films exhibited positive fixed charge levels (QN/q)> 1013 cm−2, increasing slightly with deposition temperature and decreasing slightly with annealing at temperatures from 500 to 700 °C. Fourier transform infrared spectroscopy and Auger depth profiling were used to study the impurities in the films and at the interface. Metal–insulator–silicon field effect transistors made with these films showed room temperature effective channel hole mobilities of 37 cm2 V−1 s−1.


2016 ◽  
Vol 2 (3) ◽  
pp. 7 ◽  
Author(s):  
Ömer Güllü

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.


1992 ◽  
Vol 260 ◽  
Author(s):  
J. P. Gambino ◽  
B. Cunningham ◽  
D. A. Buchanan

ABSTRACTCoSi2, or TiSi2 formation on gate polysilicon can degrade the current-voltage and capacitance-voltage characteristics of MOS capacitors. Degradation of the gate oxide breakdown field is much more severe for capacitors with TiSi2 than for those with COSi2 TEM reveals evidence for a reaction at the interface between TiSi2 and SiO2, whereas there is no observable reaction between COSi2 and SiO2- The low breakdown fields for devices with TiSi2 may be due to thinning of the gate oxide by the interfacial reaction or mechanical deformation. A high density of electron traps and a small reduction in the breakdown field is observed when COSi2 contacts the gate, possibly due to a compressive stress in the oxide exerted by the suicide. In addition, an increase in the interface state density at the Si-SiO2 interface is seen for all samples exposed to a rapid thermal anneal (RTA) at 800°C, possibly due to the release of H from dangling bonds.


2016 ◽  
Vol 2 (3) ◽  
pp. 7 ◽  
Author(s):  
Ömer Güllü

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.


2016 ◽  
Vol 2 (3) ◽  
pp. 7
Author(s):  
Ömer Güllü

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.


2003 ◽  
Vol 764 ◽  
Author(s):  
A. Chen ◽  
J. Woodall ◽  
X.W. Wang ◽  
T.P. Ma

AbstractGallium Phosphide (GaP) Metal-Insulator-Semiconductor (MIS) capacitors were fabricated with synthesized SiN as the gate dielectric. The interface property and the SiN bulk quality were studied with capacitance-voltage (C-V) measurements and current-voltage (I-V) measurements. The total interface state density of 3×1012 cm-2 and the fixed charge density in SiN of 7×1012cm-2 were estimated from the C-V measurements. The leakage current density was as low as 15nA/cm2 at an effective electric field of 3MV/cm. The effective electric field in SiN at breakdown was as high as 10MV/cm. Constant current stress measurements showed bulk trap density of 2×1011 cm-2 in SiN, which is much lower than that for CVD SiN or SiO2.


1989 ◽  
Vol 160 ◽  
Author(s):  
Y.W. Choi ◽  
C.R. Wie ◽  
K.R. Evans ◽  
C.E. Stutz

AbstractDifferent in-plane mismatch was introduced by varying the Ga 0.92In0.08As(p+) epilayer thickness (h-0.1, 0.25, 0.5 and lum) on GaAs(n)/GaAs(n+) structure. For sample with h-lum, quasi-Fermi level pinning effect was observed in low temperature forward Current-Voltage characteristic due to high density misfit dislocation. From Vint measurement at low frequency limit in C-2 vs Voltage plot, interface state density Nss was obtained. From Capacitance-Voltage measurements at different frequencies, single-level interface state density Ns was estimated using Schokley-Read-Hall statistics. Both Nss and Ns show their linear relation with epilayer in-plane mismatch. Admittance Spectroscopy shows an interface trap level at about Ev + 0.36 eV with the hole capture cross section cp = 2.7×10-15 cm-2 for the h-lum sample, and at Ev + 0.21 eV with cP = 2.4×10-16 cm-2 for the h-0.5um sample.


2016 ◽  
Vol 5 (1) ◽  
pp. 7
Author(s):  
Ömer Güllü

This work includes fabrication and electrical characterization of Metal/Interlayer/Semiconductor (MIS) structures with methyl violet organic film on p-InP wafer. Metal(Ag)/ Interlayer (methyl violet =MV)/Semiconductor(p-InP) MIS structure presents a rectifying contact behavior. The values of ideality factor (n) and barrier height (BH) for the Ag/MV/p-InP MIS diode by using the current-voltage (I-V) measurement have been extracted as 1.21 and 0.84 eV, respectively. It was seen that the BH value of 0.84 eV calculated for the Ag/MV/p-InP MIS structure was significantly higher than the value of 0.64 eV of Ag/p-InP control contact. This situation was ascribed to the fact that the MV organic interlayer increased the effective barrier height by influencing the space charge region of inorganic semiconductor. The values of diffusion potential and barrier height for the Ag/MV/p-InP MIS diode by using the capacitance-voltage (C-V) measurement have been extracted as 1.21 V and 0.84 eV, respectively. The interface-state density of the Ag/MV/p-InP structure was seen to change from 2.57×1013 eV-1cm-2 to 2.19×1012 eV-1cm-2.


1997 ◽  
Vol 485 ◽  
Author(s):  
B. G Budaguan ◽  
A. A. Aivazov ◽  
A. A. Sherchenkov ◽  
A. V Blrjukov ◽  
V. D. Chernomordic ◽  
...  

AbstractIn this work a-Si:H/c-Si heterostructures with good electronic properties of a-Si:H were prepared by 55 kHz Plasma Enhanced Chemical Vapor Deposition (PECVD). Currentvoltage and capacitance-voltage characteristics of a-Si:H/c-Si heterostructures were measuredto investigate the influence of low frequency plasma on the growing film and amorphous silicon/crystalline silicon boundary. It was established that the interface state density is low enough for device applications (<2.1010 cm−2). The current voltage measurements suggest that, when forward biased, space-charge-limited current determines the transport mechanism in a- Si:H/c-Si heterostructures, while reverse current is ascribed to the generation current in a-Si:H and c-Si depletion layers.


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