Ion Implantation in Gallium Indium Arsenide

1983 ◽  
Vol 27 ◽  
Author(s):  
M. Anjum ◽  
M. A. Shahid ◽  
S. S. Gill ◽  
B. J. Sealy ◽  
J. H. Marsh

ABSTRACTWe have studied the formation of heavily doped n-type layers in LPE GaInAs using ion implantation. 400 keV selenium ions have been implanted in dose ranges of 5 × 1013 to 1 × 1015 cm−2 at room temperature. For the high dose implants we have reproducibly achieved activities of 20–40% and sheet Hall mobilities of 700–1000 cm−2 V−1 s−1 and peak carrier concentrations of about 1019 cm−3. TEM and RBS results indicate that for long time anneals residual damage persists in the implanted layers, however, anneals at 800°C for 30 seconds perfectly recrystallize the implanted layers.

1983 ◽  
Vol 27 ◽  
Author(s):  
J.C. Soares ◽  
A.A. Melo ◽  
M.F. DA Silva ◽  
E.J. Alves ◽  
K. Freitag ◽  
...  

ABSTRACTLow and high dose hafnium imolanted beryllium samoles have been prepared at room temperature by ion implantation of beryllium commercial foils and single crystals. These samples have been studied before and after annealing with the time differential perturbed angular correlation method (TDPAC) and with Rutherford backscattering and channeling techniques. A new metastable system has been discovered in TDPAC-measurements in a low dose hafnium implanted beryllium foil annealed at 500°C. Channeling measurements show that the hafnium atoms after annealing, are in the regular tetrahedral sites but dislocated from the previous position occupied after implantation. The formation of this system is connected with the redistribution of oxygen in a thin layer under the surface. This effect does not take place precisely at the same temperature in foils and in single crystals.


1997 ◽  
Vol 500 ◽  
Author(s):  
Akira Nishiyama ◽  
Osamu Arisumi ◽  
Makoto Yoshimi

ABSTRACTN+ and p+ SiGe layers were formed in the source regions of SOI MOSFETs in order to suppress the floating-body effects by means of high-dose Ge implantation. The bandgaps of the layers were evaluated by measuring the temperature dependence of the base current of the source/channel/drain lateral bipolar transistors. It has been found that the reductions of the bandgaps due to the SiGe formation by the Ge implantation were relatively small, compared to those obtained by the theoretical calculation for heavily doped SiGe. It was also found that the bandgap reduction was larger for n+ layers than that for p+ layers.


1985 ◽  
Vol 45 ◽  
Author(s):  
Josef Goetzlich

ABSTRACTHigh-dose arsenic and phosphorus ion implanted silicon was annealed either by a CW CO2 or a pulsed Nd:YAG laser creating supersaturated dopant concentrations up to 3·1021 cm−3. The relaxation of these metastable electrically active atoms was investigated during thermal post-annealing at temperatures between 600 and 1000°C for times between 3 and 106 s. In heavily doped samples which contain residual damage after laser annealing, a very fast first relaxation phase is observed followed by a much slower second phase. In samples without residual damage only this second slower phase is seen. Carrier concentration profile measurements show that the saturation concentration after the relaxation depends only on temperature and corresponds to the concentration in thermal equilibrium. Using reaction kinetics a cluster model is proposed which demonstrates that in As doped layers the most probable number of As atoms in one cluster depends on temperature (4 As atoms at 700°C, 3 As atoms at 800 - 1000°C). In P doped layers the most probable clusters contain 3 P atoms at temperatures between 700 and 900°C.


1993 ◽  
Vol 324 ◽  
Author(s):  
J. D. Webb ◽  
D. J. Dunlavy ◽  
T. Ciszek ◽  
R. K. Ahrenkiel ◽  
M. W. Wanlass ◽  
...  

AbstractThis paper demonstrates the utility of a Fourier transform (FT) Raman spectrophotometer in obtaining the room-temperature photoluminescence (PL) spectra of semiconductors used in photovoltaic and electro-optical devices. Sample types analyzed by FT-PL spectroscopy included bulk silicon and films of copper indium diselenide (CuInSej), gallium indium arsenide (GaInAs), indium phosphide arsenide, (InPAs), and gallium arsenide-germanium alloy (GaAsGe) on various substrates. The FTIR-PL technique exhibits advantages in speed, sensitivity, and freedom from stray light over conventional dispersive methods, and can be used in some cases to characterize complete semiconductor devices as well as component materials at room temperature. Recent innovations that improve the spectral range of the technique and eliminate instrumental spectral artifacts are described.


1995 ◽  
Vol 396 ◽  
Author(s):  
C. Serre ◽  
A. Pérez-rodríguez ◽  
L. Calvo-Barrio ◽  
A. Romano-RodríGuez ◽  
J.R. Morante ◽  
...  

AbstractThe use of high dose carbon ion implantation in Si for the production of ultrathin membranes is investigated. Carbon implantations with doses up to 1018 cm-8 and energies up to 300 keV, at room temperature and 500°C were used, followed by 10 hours annealing at 1150°C. Structural and chemical analysis has been performed (including TEM, XPS, Raman and IR spectroscopies), and the etch properties have been investigated for KOH and TMAH etchants. It is found that doses higher than 1017 cm-2 are needed to obtain efficient etch-stop layers in TMAH, independently of the annealing conditions, while in contrast with previous work, it was not possible to obtain satisfactory results using KOH. According to this, ultrathin crystalline membranes (below 500 nm thick) with average surface roughness as low as 4.8 nm, measured by AFM, were obtained, and the structural analysis revealed the formation of a highly stable buried layer of crystalline β-SiC precipitates aligned with the Si matrix. These results corroborate the ability of high dose C ion implantation to obtain buried layers usable for micomachining applications.


1989 ◽  
Vol 147 ◽  
Author(s):  
K. M. Yu ◽  
B. Katz ◽  
I. C. Wu ◽  
I. G. Brown

AbstractWe have investigated the formation of IrSi3 layers buried in <111> silicon. The layers are formed by iridium ion implantation using a metal vapor vacuum arc (MEVVA) high current metal ion source at room temperature with average beam energy = 130 keV. Doses of the Ir ions ranging from 2×1016 to 1.5×1017/cm2 were implanted into <111> Si. The formation of IrSi3 phase is realized after annealing at temperatures as low as 500°C. A continuous IrSi3 layer of =200 Å thick buried under =400 Å Si was achieved with samples implanted with doses not less than 3.5×1016/cm2. Implantated doses above 8×1016/cm2 resulted in the formation of an IrSi3 layer on the surface due to excessive sputtering of Si by the TI ions. The effects of implant dose on phase formation, interface morphology and implanted atom redistribution are discussed. Radiation damage and regrowth of Si due to the implantation process was also studied.


1985 ◽  
Vol 45 ◽  
Author(s):  
T.E. Seidel

ABSTRACTRapid Thermal Processing (RTP) is used to study shallow junction formation for high dose implanted silicon. The residual damage from As damage is efficiently removed using high temperature-short time anneals (1100°C - few seconds), while limited arsenic atom diffusion is obtained. The diffusion properties are also characterized by concentration enhanced diffusion at higher doping. The higher doping is metastable, with reversible changes in resistivity observed for sequential 1100°C-800°C-1100°C-800°C thermal cycles. RTP gives shallower defect free As junctions than standard long time anneals. Boron junctions are limited by the depth extension of a large ion-channeling-tail which is shown to undergo local enhanced diffusion. The approaches to form shallow p+ junctions without channel tails are discussed. A summary of ion damage studies is made. Some generalizations for determining an RTP advantage or disadvantage are made, based on activation energy differences of effects.


Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.


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