A Recessed-Gate In0.52Al0.48As/n+-In0.53Ga0.47As Misfet

1988 ◽  
Vol 144 ◽  
Author(s):  
Jesús A. del Alamo ◽  
Takashi Mizutani
Keyword(s):  
High Performance ◽  
Current Gain ◽  
Device Performance ◽  
Promising Candidate ◽  
Gate Structure ◽  
Source Resistance ◽  
Heavily Doped ◽  
Recessed Gate ◽  
Improve Device ◽  
A Current

ABSTRACTScaling of the In0.52Al0.48As insulator thickness of In0.52Al0.48As/n+-In0.53Ga0.47As MIStype FET's is experimentally found to result in a drastic drop of performance below 200 Å. This is demonstrated to arise from an increase in the sheet resistance of the extrinsic portions of the device that accompanies insulator scaling. In order to solve this problem, a recessed-gate dopedchannel MISFET with a very thin (300 Å) n+-In0.53Ga0.47As cap layer has been fabricated. A 1.5 μm long gate device showed a transconductance of 285 mS/mm and a current-gain cut-off frequency of 19.4 GHz. This result proves the ability of a thin n+-In0.53Ga0.47As cap to reduce source resistance and improve device performance. The fabricated recessed-gate structure is a promising candidate for high-performance scaled MIS-type FET's based on thin, heavily-doped In0.53Gav0.47 As channels.

Soluble poly(4-fluorostyrene): a high-performance dielectric electret for organic transistors and memories

2020 ◽  
Vol 7 (7) ◽  
pp. 1861-1871 ◽  
Author(s):  
Yuanwei Zhu ◽  
Yongkang Fan ◽  
Shengtao Li ◽  
Peng Wei ◽  
Dongfan Li ◽  
...  
Keyword(s):  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Charge Storage ◽  
Organic Transistors ◽  
Device Performance ◽  
Effect Transistor ◽  
Improve Device ◽  
Soluble Poly

Poly(4-fluorostyrene) with strong charge storage capability is introduced as an electret in a field-effect transistor to improve device performance and memory stability.

Simulations of AlGaAs/GaAs heterojunction phototransistors

Open Physics ◽  
2011 ◽  
Vol 9 (4) ◽  
Author(s):  
Beata Ściana ◽  
Marek Panek ◽  
Artur Borczuch ◽  
Marek Tłaczała
Keyword(s):  
Integrated Circuits ◽  
Computer Simulations ◽  
Time Response ◽  
Current Gain ◽  
Device Performance ◽  
Optoelectronic Integrated Circuits ◽  
Lack Of Information ◽  
Simulation Results ◽  
Improve Device ◽  
Higher Sensitivity

AbstractHeterojunction bipolar phototransistors, based on GaAs technology, are widely used in optoelectronic integrated circuits. One of the methods to improve phototransistor performance is applying a delta-doped thin base, which causes both a higher current gain and a better time response. There is a lack of information about this kind of device in the literature. Our work presents the results of computer simulations of AlGaAs/GaAs n-p-n phototransistors, with a bulk-doped and delta-doped base working as two- and threeterminal devices. The characteristics and device parameters obtained clearly show that phototransistors with delta-doped base have higher sensitivity and a better time response compared to the structures with a bulk-doped base. Based on simulation results, we modified the epitaxial phototransistor structure with a double delta-doped base that should improve device performance.

Sub 0.1 μm Asymmetric Γ-gate PHEMT Process Using Electron Beam Lithography

2002 ◽  
Vol 720 ◽  
Author(s):  
W. S. Sul ◽  
D. H. Shin ◽  
J. K. Rhee
Keyword(s):  
High Performance ◽  
High Electron Mobility Transistors ◽  
Current Gain ◽  
High Electron ◽  
Saturation Current ◽  
Frequency Range ◽  
Electron Mobility Transistors ◽  
Dc Characteristics ◽  
Saturation Current Density ◽  
A Current

AbstractIn this paper, we have studied on the fabrication of GaAs-based pseudomorphic high electron mobility transistors (PHEMT's) for the purpose of millimeter-wave applications. To fabricate the high performance GaAs-based PHEMT's, we have developed unit processes, such as 0.1 μm Γ-gate lithography, silicon nitride passivation, and air-bridge process to achieve high performance of device characteristics. The DC characteristics of the fabricated PHEMT was measured at a unit gate width of 70 μm and 2 gate fingers, and showed a good pinch-off property (VP = -1 V) and a drain-source saturation current density (Idss) of 373.53 mA/mm. Maximum extrinsic transconductance (gm) was 522.4 mS/mm at Vgs = -0.3 V, Vds = 1.5 V, and Ids = 0.5 Idss. The RF measurements were performed in the frequency range of 1.0 ∼ 50 GHz. For this measurement, the drain and gate voltage were 1.5 V and -0.3 V, respectively. At 50 GHz, 9.2 dB of maximum stable gain (MSG) and 4.2 dB of S21 gain were obtained, respectively. A current gain cut-off frequency (fT) of 113 GHz and a maximum frequency of oscillation (fmax) of 180 GHz were achieved from the fabricated PHEMT with a 0.1 μm gate length.

A Novel Backside Gate Structure to Improve Device Performance

2015 ◽  
Vol 66 (1) ◽  
pp. 185-190
Author(s):  
Y.-H. Hwang ◽  
W. Zhu ◽  
C. Dong ◽  
S. Ahn ◽  
F. Ren ◽  
...  
Keyword(s):  
Device Performance ◽  
Gate Structure ◽  
Improve Device

Pharmacokinetics and Tissue Distribution Study of Ferruginol in Wistar Rat by High-performance Liquid Chromatography

2018 ◽  
Vol 15 (1) ◽  
pp. 67-73 ◽  
Author(s):  
Guiyun Cao ◽  
Suqiao Han ◽  
Keke Li ◽  
Li Shen ◽  
Xiaohong Wang ◽  
...  
Keyword(s):  
Tissue Distribution ◽  
Mobile Phase ◽  
High Performance ◽  
Wistar Rat ◽  
Freezing And Thawing ◽  
Promising Candidate ◽  
Distribution Study ◽  
Substance Loss ◽  
Tissue Distribution Study ◽  
The Brain

Background: Ferruginol (FRGN) exhibits a broad range of pharmacological properties which make it a promising candidate for chemoprevention. However, little is known about its absorption, distribution, metabolism, excretion, and toxicity (ADMET) properties. Methods: A rapid, sensitive and specific HPLC-DAD method was established to quantify FRGN in the plasma and tissues of Wistar rats. After extraction of FRGN with ethyl acetate (EtOAc), chromatographic separation was performed on a YMC ODS C18 column (250 × 4.6 mm I.D., 5 µm) with a mobile phase consisting of methanol-water (92:8, v/v) at a flow rate of 0.9 mL/min. Detection was conducted with a wavelength of 273 nm at 25 °C. Results: The calibration curves for FRGN were linear in the concentration range of 0.5-20 µg/mL for plasma, 0.5-10 µg/mL for heart, liver, spleen, lung, kidney, stomach, intestine, brain and muscle. After three cycles of freezing and thawing, the concentration variations were within ± 7% of nominal concentrations, indicating no significant substance loss during repeated thawing and freezing. The assay was applied to pharmacokinetic and tissue distribution study in rats. Results suggested that lung, heart, liver, spleen and kidney were the major distribution tissues of FRGN in rats, and FRGN could permeate the blood-brain barrier to distribute in the brain of rats. Conclusion: The information provided by this research is very useful for gaining knowledge of the pharmacokinetic process and tissue distribution of FRGN.

GaAlAs/GaAs heterojunction bipolar phototransistors grown by LPE with a current gain of 50 000

1985 ◽  
Vol 21 (24) ◽  
pp. 1124 ◽  
Author(s):  
A. Cazarre ◽  
J. Tasselli ◽  
A. Marty ◽  
J.P. Bailbe ◽  
G. Rey
Keyword(s):  
Current Gain ◽  
A Current

Improving the Organic Semiconductor- Metal Contact Interface in Printed High Performance Organic TFTs

2012 ◽  
Vol 1402 ◽  
Author(s):  
Kanan Puntambekar ◽  
Lisa Stecker ◽  
Kurt Ulmer ◽  
Themistokles Afentakis ◽  
Steven Droes
Keyword(s):  
Organic Semiconductor ◽  
High Performance ◽  
Thin Film Transistor ◽  
Device Performance ◽  
Organic Thin Film ◽  
Contact Interface ◽  
Organic Thin Film Transistor ◽  
Metal Electrodes ◽  
Free Surfaces ◽  
Gas Plasma

ABSTRACTOptimization of the interface between the organic semiconductor (OSC) & the source-drain (S/D) electrode is critical in order to improve organic thin film transistor (OTFT) device performance. This process typically involves coating the metal S/D electrodes with an optimal self-assembled thiol layer; a process that requires pristine metal surfaces for successful treatment. Obtaining contamination free surfaces can be challenging in the case of printed metal electrodes. Here we demonstrate an effective strategy to address this issue by introducing a brief low power forming gas plasma treatment prior to the surface coating step. We show a two orders of magnitude decrease in the contact resistance as a result of this treatment.

A Novel High-Stress Pre-Metal Dielectric Film to Improve Device Performance for sub-65nm CMOS Manufacturing

2006 ◽  
Vol 913 ◽  
Author(s):  
Young Way Teh ◽  
John Sudijono ◽  
Alok Jain ◽  
Shankar Venkataraman ◽  
Sunder Thirupapuliyur ◽  
...  
Keyword(s):  
Performance Improvement ◽  
Dielectric Film ◽  
High Stress ◽  
Significant Degree ◽  
Strain Effect ◽  
Device Performance ◽  
Hot Carrier ◽  
Tcad Simulation ◽  
Improve Device ◽  
Deposition Techniques

AbstractThis work focuses on the development and physical characteristics of a novel dielectric film for a pre-metal dielectric (PMD) application which induces a significant degree of tensile stress in the channel of a sub-65nm node CMOS structure. The film can be deposited at low temperatures to meet the requirements of NiSi integration while maintaining void-free gap fill and superior film quality such as moisture content and uniformity. A manufacturable and highly reliable oxide film has been demonstrated through both TCAD simulation and real device data, showing ~6% NMOS Ion-Ioff improvement; no Ion-Ioff improvement or degradation on PMOS. A new concept has been proposed to explain the PMD strain effect on device performance improvement. Improvement in Hot Carrier immunity is observed compared to similar existing technologies using high density plasma (HDP) deposition techniques.

213 W 500 Mhz 4H-SiC Static Induction Transistor

2011 ◽  
Vol 130-134 ◽  
pp. 3392-3395 ◽  
Author(s):  
Gang Chen ◽  
Peng Wu ◽  
Song Bai ◽  
Zhe Yang Li ◽  
Yun Li ◽  
...  
Keyword(s):  
Current Density ◽  
Drain Current ◽  
Total Power ◽  
Class Ab ◽  
Blocking Voltage ◽  
Finger Width ◽  
Static Induction Transistor ◽  
Recessed Gate ◽  
Total Power Output ◽  
A Current

. Silicon carbide (SiC) SITs were fabricated using home-grown epi structures. The gate is a recessed gate - bottom contact (RG - B). We designed that the mesa space 2.7μm and the gate channel is 1.2μm. One cell has 400 source fingers and each source finger width is 100μm. 1mm SiC SIT yielded a current density of 123mA/mm of drain current at a drain voltage of 20V. A maximum current density of 150 mA/mm was achieved with Vd=40V. The device blocking voltage with a gate bias of-16 V was 200 V. Packaged 24-cm devices were evaluated using amplifier circuits designed for class AB operations. A total power output in excess of 213 W was obtained with a power density of 8.5 W/cm and gain of 8.5 dB at 500 MHz under pulse operation.

Sign in / Sign up

Export Citation Format

Share Document