The Electrical Behavior of Grain Boundaries in Silicon

ABSTRACTDespite the fact that lattice imaging studies have shown that grain boundaries in group IV semiconductors often have structures which are complicated and inhomogeneous on the scale of tens-tohundreds of angstroms, simple theories assuming uniform double depletion layers have recently been shown to successfully predict many of the majority carrier transport properties of these defects. On the other hand our knowledge of the interaction of grain boundaries with minority carriers is in a considerably more primitive state. I will describe recent attempts to understand the effects of illumination on grain boundary potential barrier heights and the influence of these defects on the optically generated minority carrier population. Quantifying this latter interaction is particularly important in estimating the performance of polycrystalline solar cells. Simple but elegant scanned excitation measurements for measuring s, the minority carrier recombination velocity at grain boundaries, will be reviewed. I will discuss recent measurements of s as a function of temperature and illumination intensity and show how these data can be correlated with zero-bias impedance measurements.