Effects of Electrically Active Impurities on the Epitaxial Regrowth Rate of Amorphized Silicon and Germanium

1981 ◽  
Vol 10 ◽  
Author(s):  
I. Suni ◽  
G. Göltz ◽  
M.-A. Nicolet ◽  
S. S. Lau
Keyword(s):  
Low Temperature ◽  
Point Defects ◽  
Concentration Level ◽  
Solid Phase ◽  
Surface Layers ◽  
Furnace Annealing ◽  
Epitaxial Regrowth ◽  
Silicon And Germanium ◽  
P Type ◽  
Temperature Furnace

The influence of electrically active n-type (75As) and p-type (11B) impurities on the solid phase epitaxial regrowth of ion-implanted amorphized Si<100> and Ge<100> has been studied for low temperature furnace annealing. Both types of impurity increase the rate of regrowth of both silicon and germanium at a concentration level of 1020 cm−3 . Above this level, 75As retards regrowth in germanium. In compensated surface layers, the regrowth rate slows down to the values observed in self-implanted or intrinsic crystals for both silicon and germanium. The results can be qualitatively explained in terms of electrically induced generation of point defects at the amorphous-crystalline interface.

Cobalt Contamination in Silicon

2005 ◽  
Vol 108-109 ◽  
pp. 571-576 ◽  
Author(s):  
Maria Luisa Polignano ◽  
Daniele Caputo ◽  
Davide Codegoni ◽  
Vittorio Privitera ◽  
M. Riva
Keyword(s):  
Low Temperature ◽  
Cobalt Concentration ◽  
High Concentration ◽  
Furnace Annealing ◽  
Type Silicon ◽  
P Type ◽  
Temperature Furnace

The properties of cobalt as a contaminant in p-type silicon are studied by using cobaltimplanted wafers annealed by RTP or by RTP plus a low temperature furnace annealing. It is shown that after RTP most cobalt is under the form of CoB pairs. A quantification of cobalt contamination is provided based upon SPV measurements and optical pair dissociation. However, this quantification fails in furnace-annealed wafers because of the formation of a different level. It is shown that the CoB level is located near the band edges, whereas the level formed upon a low temperature furnace annealing is located near midgap. Besides, when the cobalt concentration is high enough a small fraction of cobalt is in a level different from the CoB pair even in RTP samples. This level can probably be identified with a previously observed midgap level. It is suggested that the same level is formed in RTP plus low temperature furnace annealed samples and in high concentration RTP annealed samples, and that this level may consist in some cobalt agglomerate.

Silicon Bipolar Transistors Fabricated using Ion Implantation and Laser Annealing

1980 ◽  
Vol 1 ◽  
Author(s):  
Nobuyoshi Natsuaki ◽  
Takao Miyazaki ◽  
Makoto Ohkura ◽  
Toru Nakamura ◽  
Masao Tamura ◽  
...  
Keyword(s):  
Low Temperature ◽  
Laser Pulse ◽  
Laser Irradiation ◽  
Ruby Laser ◽  
Laser Annealing ◽  
Bipolar Transistors ◽  
Pulse Irradiation ◽  
Irradiation Effects ◽  
Furnace Annealing ◽  
Temperature Furnace

ABSTRACTBipolar transistors with laser annealed base and emitter, as well as those with furnace annealed base and laser annealed emitter, have been successfully fabricated using Q-switched ruby laser pulse irradiation. The performance of laser asannealed transistors is rather poor. However, it can be improved, to some extent, by relatively low temperature furnace annealing after laser irradiation. DC and RF characteristics of laser annealed transistors are presented in conjunction with laser irradiation effects on the characteristics of conventionally fabricated transistors.

Comparison of Structural and Electrical Characteristics of Solid-Phase Epitaxial Films Recrystallized By Rapid Thermal Annealing and Furnace Annealing

1985 ◽  
Vol 53 ◽  
Author(s):  
R. Sundaresan ◽  
P.-H. Chang ◽  
S.D.S. Malhi ◽  
H.W. Lam
Keyword(s):  
Solid Phase ◽  
Epitaxial Films ◽  
Electrical Characteristics ◽  
Lateral Extension ◽  
Rapid Thermal Anneal ◽  
Furnace Annealing ◽  
Layer 4 ◽  
Polysilicon Films ◽  
Average Electron ◽  
Temperature Furnace

ABSTRACTSolid-phase epitaxial regrowth of polysilicon films. amorphized by a room-temperature silicon implant. has been achieved using a (low temperature) furnace anneal or a (high temperature) rapid thermal anneal. Lateral extension of the growth onto an oxide layer, 4 μm wide, has also been observed. The electrical properties of the films were examined by building MO2S devices in them. Average electron mobilities of 520 cm2/v-sec and 200 cm2/v-sec have been measured for films regrown on top of silicon and oxide respectively.

Low-Temperature Solid Phase Epitaxial Regrowth of Silicon for Stacked Static Random Memory Application

2011 ◽  
Vol 50 (1S1) ◽  
pp. 01AB06 ◽  
Author(s):  
Kong-Soo Lee ◽  
Chadong Yeo ◽  
Dae-Han Yoo ◽  
Seok-Sik Kim ◽  
Joo-Tae Moon ◽  
...  
Keyword(s):  
Low Temperature ◽  
Solid Phase ◽  
Epitaxial Regrowth

Boron Solubility Limits Following Low Temperature Solid Phase Epitaxial Regrowth

2001 ◽  
Vol 669 ◽  
Author(s):  
C. D. Lindfors ◽  
K. S. Jones ◽  
M. J. Rendon
Keyword(s):  
Low Temperature ◽  
Hall Effect ◽  
Sheet Resistance ◽  
Solid Phase ◽  
Electrical Measurements ◽  
Epitaxial Regrowth ◽  
Higher Doses

ABSTRACTThe work described herein focuses on examining the effect of solid phase epitaxial regrowth (SPER) on boron implanted silicon. It is shown that boron levels within the silicon can greatly enhance or reduce the regrowth rate of the silicon. Electrical measurements show optimum sheet resistances for 5 keV, 2×1015 cm−2 implant conditions yielding sheet resistance values of ∼140 Ω/sq at 500 °C annealing to ∼120 Ω/sq at 650 °C. Results using Hall effect and four-point probe show lower doses of boron will become fully active but levels will drop significantly as dose is increased. Lastly, maximum active concentrations of boron appear to reach values of ∼3-4×1020 cm−3 for a boron dose of 1×1015 cm−2 after SPER. Lower SPER anneal temperatures or higher doses tend to activate less boron.

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