Recent Progress in Downsizing FeFETs for Fe-NAND Application

2011 ◽  
Vol 1337 ◽  
Author(s):  
Le Van Hai ◽  
Mitsue Takahashi ◽  
Shigeki Sakai
Keyword(s):  
Electron Beam ◽  
Electron Beam Lithography ◽  
Inductively Coupled Plasma ◽  
Field Effect ◽  
Recent Progress ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Electrical Characteristics ◽  
Gate Stacks ◽  
Inductively Coupled

ABSTRACTSub-micrometer ferroelectric-gate field-effect transistors (FeFETs) of 0.56 μm and 0.50 μm gate lengths were successfully fabricated for Fe-NAND cells. Gate stacks of the FeFETs were Pt/SrBi2Ta2O9(SBT)/Hf-Al-O/Si. The gate stacks were formed by electron beam lithography and inductively coupled plasma reactive ion etching (ICP-RIE). Ti and SiO2 hard masks were used for the 0.56 μm- and 0.50 μm-gate FeFETs, respectively, in the ICP-RIE process. Steep SBT sidewalls with the angle of 85° were obtained by using the SiO2 hard masks while 76° sidewalls were shown using Ti hard masks. All fabricated FeFETs showed good electrical characteristics. Drain current hysteresis showed larger memory windows than 0.95 V when the gate voltages were swung between 1±5 V. The FeFETs showed stable endurance behaviors over 108 program/erase cycles. Drain current retention properties of the FeFETs were good so that the drain current on/off ratios did not show practical changes after 3 days.

Change in Characteristics of SiC MOSFETs by Gamma-Ray Irradiation at High Temperature

2016 ◽  
Vol 858 ◽  
pp. 860-863 ◽  
Author(s):  
Takuma Matsuda ◽  
Takashi Yokoseki ◽  
Satoshi Mitomo ◽  
Koichi Murata ◽  
Takahiro Makino ◽  
...  
Keyword(s):  
Field Effect ◽  
Gamma Ray ◽  
Field Effect Transistors ◽  
Absorbed Dose ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Radiation Response ◽  
Electrical Characteristics ◽  
Gamma Ray Irradiation

Radiation response of 4H-SiC vertical power Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) was investigated at 150°C up to 10.4 MGy. Until irradiation at 1.2 MGy, the drain current – gate voltage curves of the SiC MOSFETs shifted to the negative voltage side, and the leakage of drain current at gate voltages below threshold voltage increased with increasing absorbed dose. However, no significant change in the electrical characteristics of SiC MOSFETs was observed at doses above 1.2 MGy. For blocking characteristics, there were no degradations of the SiC MOSFETs irradiated at 150°C even after irradiated at 10.4 MGy.

scholarly journals Physical and Electrical Characteristics of Carbon Nanotube Network Field-Effect Transistors Synthesized by Alcohol Catalytic Chemical Vapor Deposition

2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
Chin-Lung Cheng ◽  
Chien-Wei Liu ◽  
Bau-Tong Dai ◽  
Ming-Yen Lee
Keyword(s):  
Chemical Vapor Deposition ◽  
Carbon Nanotube ◽  
Vapor Deposition ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Chemical Vapor ◽  
Drain Current ◽  
Electrical Characteristics ◽  
Carbon Nanotube Network ◽  
Carbon Nanotube Networks

Carbon nanotubes (CNTs) have been explored in nanoelectronics to realize desirable device performances. Thus, carbon nanotube network field-effect transistors (CNTNFETs) have been developed directly by means of alcohol catalytic chemical vapor deposition (ACCVD) method using Co-Mo catalysts in this work. Various treated temperatures, growth time, and Co/Mo catalysts were employed to explore various surface morphologies of carbon nanotube networks (CNTNs) formed on the SiO2/n-type Si(100) stacked substrate. Experimental results show that most semiconducting single-walled carbon nanotube networks with 5–7 nm in diameter and low disorder-induced mode (D-band) were grown. A bipolar property of CNTNFETs synthesized by ACCVD and using HfO2as top-gate dielectric was demonstrated. Various electrical characteristics, including drain current versus drain voltage(Id-Vd), drain current versus gate voltage(Id-Vg), mobility, subthreshold slope (SS), and transconductance(Gm), were obtained.

scholarly journals Simulation studies on electrical characteristics of silicon nanowire feedback field-effect transistors with interface trap charges

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Yejin Yang ◽  
Young-Soo Park ◽  
Jaemin Son ◽  
Kyoungah Cho ◽  
Sangsig Kim
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Silicon Nanowire ◽  
Drain Current ◽  
Memory Window ◽  
Interface Trap ◽  
Electrical Characteristics ◽  
The Difference ◽  
Trap Charges

AbstractIn this study, we examine the electrical characteristics of silicon nanowire feedback field-effect transistors (FBFETs) with interface trap charges between the channel and gate oxide. The band diagram, I–V characteristics, memory window, and operation were analyzed using a commercial technology computer-aided design simulation. In an n-channel FBFET, the memory window narrows (widens) from 5.47 to 3.59 V (9.24 V), as the density of the positive (negative) trap charges increases. In contrast, in the p-channel FBFET, the memory window widens (narrows) from 5.38 to 7.38 V (4.18 V), as the density of the positive (negative) trap charges increases. Moreover, we investigate the difference in the output drain current based on the interface trap charges during the memory operation.

Effects of Recess Depth Under the Gate Area on the Vth-Shift for Fabricating Normally-Off Field Effect Transistors on AlGaN/GaN Heterostructures

2020 ◽  
Vol 20 (7) ◽  
pp. 4170-4175
Author(s):  
Zin-Sig Kim ◽  
Hyung Seok Lee ◽  
Sung-Bum Bae ◽  
Eun Soo Nam ◽  
Jong-Won Lim
Keyword(s):  
Inductively Coupled Plasma ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Etching Rate ◽  
Dry Etching ◽  
Inductively Coupled ◽  
Etch Stop ◽  
Gan Heterostructure ◽  
Gate Region ◽  
Low Rate

Fabrication of normally-off field effect transistors (FETs) possessed uniform turn-on threshold voltage (Vth) is of special interests. In this work, they were fabricated using dry etching recess techniques under the gate region, with dry etching conditions of extremely low rate. We report how the recess depth under the gate area induced the Vth shift of normally-off FETs on AlGaN/GaN heterostructure, which were fabricated with a 1.5 nm/min etching rate. Chlorine-based inductively coupled plasma (ICP) was applied to perform the etching process for the AlGaN/GaN heterostructure. Devices were fabricated with different recess depths under the gate area, and examined to determine their performances, particularly the dependence of recess time and recess depth on Vth shift. The applied dry etching conditions resulted in a low-damaged and not-rough morphology on the etched surfaces of AlGaN/GaN. Fine controlled and well defined recess depth of the AlGaN/GaN heterostructure under the gate region was achieved with no etch-stop layers. Conventional fabrication processes were applied with the dry etching conditions of extremely low rate to fabricate normally-off MOSFETs of Al2O3/AlGaN/GaN. The achieved Vth of +5.64 V was high positive and the leakage current of off-state was measured as ~10−6 A/mm.

Influence of electron-beam lithography exposure current level on the transport characteristics of graphene field effect transistors

2016 ◽  
Vol 119 (12) ◽  
pp. 124502 ◽  
Author(s):  
Sangwoo Kang ◽  
Hema C. P. Movva ◽  
Atresh Sanne ◽  
Amritesh Rai ◽  
Sanjay K. Banerjee
Keyword(s):  
Electron Beam ◽  
Electron Beam Lithography ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Current Level
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