Novel 10-T Write Driver SRAM Design Using 45 nm CMOS Technology with Leakage Current Reduction Scheme for FPGA Routing Switch Architecture
2018 ◽
Vol 13
(5)
◽
pp. 775-787
◽
Keyword(s):
2012 ◽
Vol 33
(5)
◽
pp. 055001
◽
Keyword(s):
2008 ◽
Vol E91-C
(4)
◽
pp. 534-542
◽
Keyword(s):
Keyword(s):
2011 ◽
pp. 738-742
Keyword(s):
Keyword(s):