scholarly journals Modeling and Analysis of New Multilevel Inverter for Solar Photovoltaic Power Plant

2016 ◽  
Vol 2016 ◽  
pp. 1-8 ◽  
Author(s):  
Xiaoqiang Guo ◽  
Ran He ◽  
Mehdi Narimani
Keyword(s):  
Power Plant ◽  
High Voltage ◽  
Renewable Energy Sources ◽  
Solar Photovoltaic ◽  
Common Mode ◽  
Modeling And Analysis ◽  
Multilevel Inverters ◽  
Common Mode Voltage ◽  
The Common ◽  
And Control

Solar photovoltaic (PV) power plant is an effective way to utilize the renewable energy sources. EMI is one of the major concerns in PV power plant. Typically, the multilevel inverters are used in high voltage PV power plant. However, the conventional multilevel inverters require more semiconductors, which complicate the circuit structure and control algorithm. In this paper, a novel five-level inverter is introduced for the high voltage PV power plant applications. The model of the inverter is analyzed. With the redundant switching states, a new modulation strategy is proposed to reduce the common-mode voltage and EMI. The proposed approach is able to eliminate the common-mode voltage; meanwhile it has the capability of balancing the capacitor voltages. The cosimulation tests with the Matlab/Simulink and S-function are carried out. The results verify the effectiveness of the proposed method.

scholarly journals Modeling and Modulation of NNPC Four-Level Inverter for Solar Photovoltaic Power Plant

2017 ◽  
Vol 2017 ◽  
pp. 1-8 ◽  
Author(s):  
Xiaoqiang Guo ◽  
Xuehui Wang ◽  
Ran He ◽  
Mehdi Narimani
Keyword(s):  
Power Plant ◽  
Neutral Point ◽  
Multilevel Inverter ◽  
Solar Photovoltaic ◽  
Common Mode ◽  
Practical Applications ◽  
Common Mode Voltage ◽  
Photovoltaic Power ◽  
The Common ◽  
Conventional Solution

Photovoltaic (PV) power plant is an attractive way of utilizing the solar energy. For high-power PV power plant, the multilevel inverter is of potential interest. In contrast to the neutral-point clamped (NPC) or flying capacitor (FC) multilevel inverter, the nested neutral point clamped (NNPC) four-level inverter has better features for solar photovoltaic power plant. In practical applications, the common mode voltage reduction of the NNPC four-level is one of the important issues. In order to solve the problem, a new modulation strategy is proposed to minimize the common mode voltage. Compared with the conventional solution, our proposal can reduce the common mode voltage to 1/18 of the DC bus voltage. Moreover, it has the capability to balance the capacitor voltages. Finally, we carried out time-domain simulations to test the performance of the NNPC four-level inverter.

scholarly journals A Five-Level Converter in a Three-Level Mode for Common-Mode Leakage Current Suppression in PV-Generation Systems

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2382
Author(s):  
Aleksey V. Udovichenko ◽  
Sergey V. Brovanov ◽  
Evgeny V. Grishanov ◽  
Svetlana M. Stennikova
Keyword(s):  
Leakage Current ◽  
Pulse Width Modulation ◽  
Renewable Energy Sources ◽  
Multilevel Converter ◽  
Generation System ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Modulation Mode ◽  
The Common ◽  
Pv Generation

Power generation systems (PGSs) based on renewable energy sources are finding ever-widening applications, and many researchers work on this problem. Many papers address the problem of transformerless PGSs, but few of them aimed at conducting research on structures with multilevel converter topologies as part of a PGS. In this paper a grid-tied transformerless PV-generation system based on a multilevel converter is discussed. There are common-mode leakage currents (CMLCs), which act as a parasitic factor. It is also known that common-mode voltage is the main cause of the common-mode leakage current in grid-tied PV-generation systems. This paper considers the space vector pulse-width modulation (PWM) technique, which is used to suppress or reduce common-mode leakage current. The proposed PWM technique with the reduction of common-mode leakage current for a generation system based on the multilevel converter controlled with a PWM technique was verified experimentally. The experimental results accurately confirmed the mathematical model and the compensation achieved without errors. In the experiment, there was an approximately six-fold decrease in the common-mode leakage current (10.3 mA in rejection mode and 61 mA in non-rejection current). This can lead to the elimination of CMLC in a multilevel semiconductor converter only by changing the modulation mode. This suggests the possibility of using these devices as part of transformerless generation systems. Suppression of CMLC can only be carried out by changing the PWM algorithm. Both considered topologies can implement this mode of operation. The proposed converter has a higher efficiency up to a frequency multiplicity of 2000.

scholarly journals Carrier-Based Common Mode Voltage Control Techniques in Three-Level Diode-Clamped Inverter

2012 ◽  
Vol 2012 ◽  
pp. 1-12 ◽  
Author(s):  
Pradyumn Chaturvedi ◽  
Shailendra Jain ◽  
Pramod Agarwal
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Comparison Method ◽  
Rate Of Change ◽  
Common Mode ◽  
Multilevel Inverters ◽  
Common Mode Voltage ◽  
Voltage Signal ◽  
Comparable Performance ◽  
The Common

Switching converters are used in electric drive applications to produce variable voltage, variable frequency supply which generates harmful large dv/dt and high-frequency common mode voltages (CMV). Multilevel inverters generate lower CMV as compared to conventional two-level inverters. This paper presents simple carrier-based technique to control the common mode voltages in multilevel inverters using different structures of sine-triangle comparison method such as phase disposition (PD), phase opposition disposition (POD) by adding common mode voltage offset signal to actual reference voltage signal. This paper also presented the method to optimize the magnitude of this offset signal to reduce CMV and total harmonic distortion in inverter output voltage. The presented techniques give comparable performance as obtained in complex space vector-based control strategy, in terms of number of commutations, magnitude, and rate of change of CMV and harmonic profile of inverter output voltage. Simulation and experimental results presented confirm the effectiveness of the proposed techniques to control the common mode voltages.

scholarly journals A New Approach to the PWM Modulation for the Multiphase Matrix Converters Supplying Loads with Open-End Winding

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 466
Author(s):  
Pawel Szczepankowski ◽  
Natalia Strzelecka ◽  
Enrique Romero-Cadaval
Keyword(s):  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Simulation Software ◽  
Common Mode ◽  
New Approach ◽  
Matrix Converters ◽  
Load Voltage ◽  
Common Mode Voltage ◽  
The Common ◽  
Open End Winding

This article presents three variants of the Pulse Width Modulation (PWM) for the Double Square Multiphase type Conventional Matrix Converters (DSM-CMC) supplying loads with the open-end winding. The first variant of PWM offers the ability to obtain zero value of the common-mode voltage at the load’s terminals and applies only six switches within the modulation period. The second proposal archives for less Total Harmonic Distortion (THD) of the generated load voltage. The third variant of modulation concerns maximizing the voltage transfer ratio, minimizing the number of switching, and the common-mode voltage cancellation. The discussed modulations are based on the concept of sinusoidal voltage quadrature signals, which can be an effective alternative to the classic space-vector approach. In the proposed approach, the geometrical arrangement of basic vectors needed to synthesize output voltages is built from the less number of vectors, which is equal to the number of the matrix converter’s terminals. The PWM duty cycle computation is performed using only a second-order determinant of the voltages coordinate matrix without using trigonometric functions. A new approach to the PWM duty cycles computing and the load voltage synthesis by 5 × 5 and 12 × 12 topologies has been verified using the PSIM simulation software.

scholarly journals Opposite Triangle Carrier with SVPWM for Common-Mode Voltage Reduction in Dual Three Phase Motor Drives

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim
Keyword(s):  
Electromagnetic Interference ◽  
Pulse Width Modulation ◽  
Motor Drives ◽  
Common Mode ◽  
Pwm Inverter ◽  
Common Mode Voltage ◽  
Voltage Vector ◽  
Three Phase ◽  
The Common ◽  
Zero Voltage

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.

scholarly journals Optimization of TSPWM for Common-Mode Voltage Reduction in Vehicular Electric Drive System

2021 ◽  
Vol 13 (1) ◽  
pp. 5
Author(s):  
Shang Jiang ◽  
Yuan Wang
Keyword(s):  
Electric Drive ◽  
Drive System ◽  
Modulation Method ◽  
Time Interval ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Electric Drive System ◽  
The Common ◽  
Modulation Methods ◽  
Zero Voltage

Common-mode voltage can be reduced effectively by optimized modulation methods without increasing additional costs. However, the existing methods cannot satisfy the requirements of the vehicular electric-drive application. This paper optimizes the tri-state voltage modulation method to reduce the common-mode voltage for vehicular electric drive system applications. Firstly, the discontinuous switching issue during sector transition is analyzed. Under the limit of two switching times in one period, multiple alignments combination is proposed to address that issue. Secondly, the zero-voltage time intervals in different modulation ranges are explored. This paper proposes an unsymmetric translation method to reconstruct the voltage vector, and then the minimum zero-voltage time interval is controlled to enough value for safe switching. Finally, the proposed methods have been validated through experiments on a vehicular electric drive system. The results show that the common-mode voltage can be reduced effectively in the whole range with the optimized tri-state voltage modulation method.

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