scholarly journals Silicon Carbide Emitter Turn-Off Thyristor

2008 ◽  
Vol 2008 ◽  
pp. 1-5 ◽  
Author(s):  
Jun Wang ◽  
Gangyao Wang ◽  
Jun Li ◽  
Alex Q. Huang ◽  
Jerry Melcher ◽  
...  

A novel MOS-controlled SiC thyristor device, the SiC emitter turn-off thyristor (ETO) is a promising technology for future high-voltage switching applications because it integrates the excellent current conduction capability of a SiC thyristor with a simple MOS-control interface. Through unity-gain turn-off, the SiC ETO also achieves excellent Safe Operation Area (SOA) and faster switching speeds than silicon ETOs. The world's first 4.5-kV SiC ETO prototype shows a forward voltage drop of 4.26 V at 26.5 A/cm2 current density at room and elevated temperatures. Tested in an inductive circuit with a 2.5 kV DC link voltage and a 9.56-A load current, the SiC ETO shows a fast turn-off time of 1.63 microseconds and a low 9.88 mJ turn-off energy. The low switching loss indicates that the SiC ETO could operate at about 4 kHz if 100 W/cm2 conduction and the 100 W/cm2 turn-off losses can be removed by the thermal management system. This frequency capability is about 4 times higher than 4.5-kV-class silicon power devices. The preliminary demonstration shows that the SiC ETO is a promising candidate for high-frequency, high-voltage power conversion applications, and additional developments to optimize the device for higher voltage (>5 kV) and higher frequency (10 kHz) are needed.

2014 ◽  
Vol 64 (7) ◽  
pp. 223-236 ◽  
Author(s):  
T. Gachovska ◽  
J. L. Hudgins

2020 ◽  
Vol 1004 ◽  
pp. 911-916 ◽  
Author(s):  
Daniel Johannesson ◽  
Keijo Jacobs ◽  
Staffan Norrga ◽  
Anders Hallén ◽  
Muhammad Nawaz ◽  
...  

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general high-power application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.


2014 ◽  
Vol 778-780 ◽  
pp. 855-858 ◽  
Author(s):  
Dai Okamoto ◽  
Yasunori Tanaka ◽  
Tomonori Mizushima ◽  
Mitsuru Yoshikawa ◽  
Hiroyuki Fujisawa ◽  
...  

We successfully fabricated 13-kV, 20-A, 8 mm × 8 mm, drift-free 4H-SiC PiN diodes. The fabricated diodes exhibited breakdown voltages that exceeded 13 kV, a forward voltage drop of 4.9–5.3 V, and an on-resistance (RonAactive) of 12 mW·cm2. The blocking yield at 10 kV on a 3-in wafer exceeded 90%. We investigated failed devices using Candela defect maps and light-emission images and found that a few devices failed because of large defects on the chip. We also demonstrated that the fabricated diodes can be used in conducting high-voltage and high-current switching tests.


2020 ◽  
Vol 1014 ◽  
pp. 115-119
Author(s):  
Meng Ling Tao ◽  
Xiao Chuan Deng ◽  
Hao Wu ◽  
Yi Wen

A 10kV/100A SiC PiN rectifier with MRM-JTE (multiple-ring modulated junction termination extension) is designed, fabricated and characterized. The optimized MRM-JTE achieves high breakdown capability and extends the optimal JTE dose window. A 100μm thick epitaxial SiC PiN rectifier with a doping concentration of 5×1014cm−3 has been fabricated using a standard TZ-JTE process. A 5.4V forward voltage drop is obtained at 100A forward current. Moreover, a measured breakdown voltage is up to 13.5kV corresponding to about 96% of the ideal parallel plane junction. The fabricated device exhibits a low RON,SP of 3.76mΩ·cm2 at 200A/cm2 , and a high BFOM of 48.5GW/cm2. In addition, the C-V characteristic and reverse recovery switch characteristic are also analyzed. In this paper, the successfully fabrication of high-voltage SiC PiN rectifier provides a further development for high-voltage high-power SiC power modules.


2014 ◽  
Vol 778-780 ◽  
pp. 1038-1041 ◽  
Author(s):  
Tadayoshi Deguchi ◽  
Shuji Katakami ◽  
Hiroyuki Fujisawa ◽  
Kensuke Takenaka ◽  
Hitoshi Ishimori ◽  
...  

High-voltage SiC p-channel insulated-gate bipolar transistors (p-IGBT) utilizing current-spreading layer (CSL) formed by ion implantation are fabricated and their properties characterized. A high blocking voltage of 15 kV is achieved at room temperature by optimizing the JFET length. An ampere-class p-IGBT exhibited a low forward voltage drop of 8.5 V at 100 A/cm2 and a low differential specific on-resistance of 33 mΩ cm2 at 250 °C, while these values were high at room temperature. For further reduction of the forward voltage drop in the on-state and temperature stability, the temperature dependence of the JFET effect and carrier lifetime in p-IGBTs are investigated. Optimization of the JFET length using an epitaxial CSL, instead of applying ion implantation and lifetime enhancement, could lead to a further reduction of the forward voltage drop.


2008 ◽  
Vol 1069 ◽  
Author(s):  
Sei-Hyung Ryu ◽  
Qingchun Zhang ◽  
Husna Fatima ◽  
Sarah Haney ◽  
Robert Stahlbush ◽  
...  

ABSTRACTThis paper presents the effect of recombination-induced stacking faults on the drift based forward conduction and leakage currents of high voltage 4H-SiC power devices. To show the effects, 10 kV 4H-SiC MPS (Merged PiN Schottky) diodes have been fabricated on a standard wafer and a low BPD (Basal Plane Dislocation) wafer, and their IV characteristics were evaluated before and after a forward bias stress, which resulted in minority carrier recombination and conductivity modulation in the drift epilayer of the diodes. After the stressing, the diode fabricated on standard wafer showed a significant increase in forward voltage drop, as well as a marked increase in leakage current, which were due to induction of stacking faults. The diode on the low BPD wafer showed very little change after the stress because the induction of stacking faults was minimized. Similar results were also observed on a 10 kV 4H-SiC DMOSFET. The results suggest that recombination-induced stacking faults are detrimental to all device types, and injection of minority carriers in majority carrier devices should be avoided at all times.


2018 ◽  
Vol 924 ◽  
pp. 568-572 ◽  
Author(s):  
Arash Salemi ◽  
Hossein Elahipanah ◽  
Carl Mikael Zetterling ◽  
Mikael Östling

Implantation-free mesa etched ultra-high-voltage 4H-SiC PiN diodes are fabricated, measured and analyzed by device simulation. The diode’s design allows a high breakdown voltage of about 19.3 kV according to simulations. No reverse breakdown is observed up to 13 kV with a very low leakage current of 0.1 μA. A forward voltage drop (VF) and differential on-resistance (Diff. Ron) of 9.1 V and 41.4 mΩ cm2are measured at 100 A/cm2, respectively, indicating the effect of conductivity modulation.


2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000149-000153 ◽  
Author(s):  
Lin Cheng ◽  
Anant K. Agarwal ◽  
Michael Oloughlin ◽  
Al Burk ◽  
Craig Capell ◽  
...  

In this paper, we report our recently developed 1 × 1 cm2, 12 kV SiC GTOs with a very low differential on-resistance (RON,Diff) of 4 mΩ·cm2 with respect to the device active area at high injection level current of 100 A/cm2 or higher, which is more than a 40% reduction from our previously reported work. This significant reduction in the on-resistance was attributed to an improvement of carrier lifetime in the SiC bulk region. The SiC GTO was wire-bonded and attached to a high-voltage package before the high-temperature measurement. Forward characteristics of the device were then measured using a Tektronics 371 curve tracer from room temperature up to 400°C. Over the temperature range, the RON,Diff of the 4H-SiC GTO increased modestly from 4 mΩ·cm2 at 20°C to 4.7 mΩ·cm2 at 400°C, while the forward voltage drop at 100 A decreased slightly from 3.97 V at 20°C to 3.6 V at 400°C. The gate to cathode blocking voltage (VGK) was measured using a customized high-voltage test set-up. The leakage current was measured 0.66 μA at a VGK of 12 kV at 20°C.


2015 ◽  
Vol 54 (12) ◽  
pp. 121301 ◽  
Author(s):  
Doohyung Cho ◽  
Seulgi Sim ◽  
Kunsik Park ◽  
Jongil Won ◽  
Sanggi Kim ◽  
...  

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