Degradation of Majority Carrier Conductions and Blocking Capabilities in 4H-SiC High Voltage Devices due to Basal Plane Dislocations

2008 ◽  
Vol 1069 ◽  
Author(s):  
Sei-Hyung Ryu ◽  
Qingchun Zhang ◽  
Husna Fatima ◽  
Sarah Haney ◽  
Robert Stahlbush ◽  
...  
Keyword(s):  
High Voltage ◽  
Basal Plane ◽  
Voltage Drop ◽  
Schottky Diodes ◽  
Forward Bias ◽  
Stacking Faults ◽  
Majority Carrier ◽  
Before And After ◽  
Forward Voltage Drop ◽  
Basal Plane Dislocation

ABSTRACTThis paper presents the effect of recombination-induced stacking faults on the drift based forward conduction and leakage currents of high voltage 4H-SiC power devices. To show the effects, 10 kV 4H-SiC MPS (Merged PiN Schottky) diodes have been fabricated on a standard wafer and a low BPD (Basal Plane Dislocation) wafer, and their IV characteristics were evaluated before and after a forward bias stress, which resulted in minority carrier recombination and conductivity modulation in the drift epilayer of the diodes. After the stressing, the diode fabricated on standard wafer showed a significant increase in forward voltage drop, as well as a marked increase in leakage current, which were due to induction of stacking faults. The diode on the low BPD wafer showed very little change after the stress because the induction of stacking faults was minimized. Similar results were also observed on a 10 kV 4H-SiC DMOSFET. The results suggest that recombination-induced stacking faults are detrimental to all device types, and injection of minority carriers in majority carrier devices should be avoided at all times.

Effects of Basal Plane Dislocation Density in 4H-SiC Substrate on Degradation of Body-Diode Forward Voltage

2016 ◽  
Vol 858 ◽  
pp. 384-388 ◽  
Author(s):  
Naoyuki Kawabata ◽  
Atsushi Tanaka ◽  
Masatoshi Tsujimura ◽  
Yoshinori Ueji ◽  
Kazuhiko Omote ◽  
...  
Keyword(s):  
Basal Plane ◽  
Field Effect Transistors ◽  
Forward Bias ◽  
Oxide Semiconductor ◽  
Strong Positive Correlation ◽  
Forward Voltage ◽  
Bias Stress ◽  
Before And After ◽  
Basal Plane Dislocation ◽  
The Difference

We investigated the effect of the basal plane dislocation (BPD) density in 4H-silicon carbide (SiC) substrates on the forward voltage (Vsd) degradation of body-diodes. Using reflection X-ray topography, the BPD density was automatically estimated from the substrates prior to fabrication of metal–oxide–semiconductor field-effect transistors (MOSFETs). A strong positive correlation was found between the Vsd shift, which was calculated from the difference before and after forward bias stress at 160 A/cm2 for ~500 hours, and the BPD density of the substrate. We show that it is possible to predict Vsd shifts from the BPD densities of SiC substrates prior to the fabrication of MOSFETs. In addition, we examined the origin of stacking faults (SFs) as a result of the application of forward bias stress. We presume that SFs are formed by BPDs converted to threading edge dislocations at the epi/sub interface, as well as by BPDs penetrating into the epitaxial layer.

Effect of Recombination-Induced Stacking Faults on Majority Carrier Conduction and Reverse Leakage Current on 10 kV SiC DMOSFETs

2008 ◽  
Vol 600-603 ◽  
pp. 1127-1130 ◽  
Author(s):  
Sei Hyung Ryu ◽  
Fatima Husna ◽  
Sarah K. Haney ◽  
Qing Chun Jon Zhang ◽  
Robert E. Stahlbush ◽  
...  
Keyword(s):  
Leakage Current ◽  
High Voltage ◽  
Stacking Faults ◽  
Power Devices ◽  
Leakage Currents ◽  
Forward Voltage ◽  
Majority Carrier ◽  
Voltage Drops ◽  
Before And After ◽  
Minority Carriers

This paper presents the effect of recombination-induced stacking faults on the drift based forward conduction and leakage currents of high voltage 4H-SiC power devices. To show the effects, IV characteristics of a 4H-SiC 10 kV DMOSFET and a 4H-SiC 4 kV BJT have been evaluated before and after the induction of stacking faults in the drift epilayer. For both devices, significant increases in forward voltage drops, as well as marked increases in leakage currents have been observed. The results suggest that injection of minority carriers in majority carrier devices should be avoided at all times.

Growth of Low Basal Plane Dislocation Density SiC Epitaxial Layers

2006 ◽  
Vol 527-529 ◽  
pp. 243-246 ◽  
Author(s):  
Ze Hong Zhang ◽  
Tangali S. Sudarshan
Keyword(s):  
Dislocation Density ◽  
Epitaxial Growth ◽  
Basal Plane ◽  
Voltage Drop ◽  
Etch Pits ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Forward Voltage Drop ◽  
Basal Plane Dislocation ◽  
Edge Dislocations

A method was developed in our laboratory to grow low basal plane dislocation (BPD) density and BPD-free SiC epilayers. The key approach is to subject the SiC substrates to defect preferential etching, followed by conventional epitaxial growth. It was found that the creation of BPD etch pits on the substrates can greatly enhance the conversion of BPDs to threading edge dislocations (TEDs) during epitaxy, and thus low BPD density and BPD-free SiC epilayers are obtained. The reason why BPD etch pits can promote the above conversion is discussed. The SiC epilayer growth by this method is very promising in overcoming forward voltage drop degradation of SiC PiN diodes.

Influence of Shockley Stacking Fault Expansion and Contraction on the Electrical Behavior of 4H-SiC DMOSFETs and MPS diodes

2008 ◽  
Vol 1069 ◽  
Author(s):  
Joshua David Caldwell ◽  
Robert E Stahlbush ◽  
Eugene A. Imhoff ◽  
Orest J. Glembocki ◽  
Karl D. Hobart ◽  
...  
Keyword(s):  
Voltage Drop ◽  
Schottky Diodes ◽  
Stacking Fault ◽  
The Body ◽  
Electrical Behavior ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Majority Carrier ◽  
Bipolar Devices ◽  
Forward Voltage Drop

ABSTRACTThe forward voltage drop (Vf) increase observed in 4H-SiC bipolar devices such as pin diodes due to recombination-induced Shockley stacking fault (SSF) creation and expansion has been widely discussed in the literature. It was long believed that the deleterious affect of these defects was limited to bipolar devices. However, it was recently reported that forward biasing of the body diode of a 10kV 4H-SiC DMOSFET led to similar Vf increases in the body diode I-V curve as well as a corresponding degradation in the majority carrier conduction characteristics as well and this degradation was believed to be due to the creation and expansion of SSFs during the body diode forward biasing. Here we report measurements comparing the influence of similar stressing, along with annealing and current-induced recovery experiments in DMOSFETs and merged pin-Schottky diodes with the previously reported results of these experiments in 4H-SiC pin diodes. The results of these experiments provide sufficient support that the observed degradation in the majority carrier conduction characteristics is the result of SSF expansion.

Extension of Stacking Faults in 4H-SiC pn Diodes under a High Current Pulse Stress

2017 ◽  
Vol 897 ◽  
pp. 218-221 ◽  
Author(s):  
Yohei Iwahashi ◽  
Masaki Miyazato ◽  
Masaaki Miyajima ◽  
Yoshiyuki Yonezawa ◽  
Tomohisa Kato ◽  
...  
Keyword(s):  
Current Pulse ◽  
Partial Dislocation ◽  
Voltage Drop ◽  
Stacking Faults ◽  
Dislocation Velocity ◽  
High Current ◽  
Nucleation Sites ◽  
Before And After ◽  
Forward Voltage Drop

We investigated the expansion of stacking faults (SFs) under a high current pulse stress in detail. In situ observations showed bar-shaped SFs and two types of triangle SFs with different nucleation sites. The calculated partial dislocation velocity of the bar-shaped SFs was four times faster than that of the triangle SFs. The temperature dependence of the partial dislocation velocity was used to estimate activation energies of 0.23±0.02 eV for bar-shaped SFs and 0.27±0.05 eV for triangle SFs. We also compared the electrical characteristics before and after the stress. The forward voltage drop slightly increased by 0.05 V, and the leakage current did not increase.

The stability of dislocation networks under various oxygen-doping conditions in superconducting Bi2Sr2CaCu2Oy single crystals and their influence on the flux pinning properties

1994 ◽  
Vol 52 ◽  
pp. 802-803
Author(s):  
Y. Feng ◽  
X. Y. Cai ◽  
R. J. Kelley ◽  
D. C. Larbalestier
Keyword(s):  
Single Crystals ◽  
Oxygen Content ◽  
Basal Plane ◽  
Flux Pinning ◽  
Pinning Centers ◽  
Before And After ◽  
Anomalous Peak ◽  
Basal Plane Dislocation ◽  
The Stability ◽  
Further Development

The issue of strong flux pinning is crucial to the further development of high critical current density Bi-Sr-Ca-Cu-O (BSCCO) superconductors in conductor-like applications, yet the pinning mechanisms are still much debated. Anomalous peaks in the M-H (magnetization vs. magnetic field) loops are commonly observed in Bi2Sr2CaCu2Oy (Bi-2212) single crystals. Oxygen vacancies may be effective flux pinning centers in BSCCO, as has been found in YBCO. However, it has also been proposed that basal-plane dislocation networks also act as effective pinning centers. Yang et al. proposed that the characteristic scale of the basal-plane dislocation networksmay strongly depend on oxygen content and the anomalous peak in the M-H loop at ˜20-30K may be due tothe flux pinning of decoupled two-dimensional pancake vortices by the dislocation networks. In light of this, we have performed an insitu observation on the dislocation networks precisely at the same region before and after annealing in air, vacuumand oxygen, in order to verify whether the dislocation networks change with varying oxygen content Inall cases, we have not found any noticeable changes in dislocation structure, regardless of the drastic changes in Tc and the anomalous magnetization. Therefore, it does not appear that the anomalous peak in the M-H loops is controlled by the basal-plane dislocation networks.

Comparison of the Forward Voltage Drop of Si and SiC High Voltage Diodes

2014 ◽  
Vol 64 (7) ◽  
pp. 223-236 ◽  
Author(s):  
T. Gachovska ◽  
J. L. Hudgins
Keyword(s):  
High Voltage ◽  
Voltage Drop ◽  
Forward Voltage ◽  
Forward Voltage Drop

Effect of Stacking Faults Originating from Half Loop Arrays on Electrical Behavior of 10 kV 4H-SiC PiN Diodes

2012 ◽  
Vol 717-720 ◽  
pp. 387-390 ◽  
Author(s):  
Robert E. Stahlbush ◽  
Qing Chun Jon Zhang ◽  
Anant K. Agarwal ◽  
Nadeemullah A. Mahadik
Keyword(s):  
Basal Plane ◽  
Forward Bias ◽  
Stacking Faults ◽  
Device Fabrication ◽  
Electrical Behavior ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Electrical Stress ◽  
Half Loop

The effects of Shockley stacking faults (SSFs) that originate from half loop arrays (HLAs) on the forward voltage and reverse leakage were measured in 10 kV 4H-SiC PiN diodes. The presence of HLAs and basal plane dislocations in each diode in a wafer was determined by ultraviolet photoluminescence imaging of the wafer before device fabrication. The SSFs were expanded by electrical stressing under forward bias of 30 A/cm2, and contracted by annealing at 550 °C. The electrical stress increased both the forward voltage and reverse leakage. Annealing returned the forward voltage and reverse leakage to nearly their original behavior. The details of SSF expansion and contraction from a HLA and the effects on the electrical behavior of the PiN diodes are discussed.

Defects and Polytype Instabilities

2018 ◽  
Vol 924 ◽  
pp. 147-150
Author(s):  
Jörg Pezoldt ◽  
Andrei Alexandrovich Kalnin
Keyword(s):  
Long Range ◽  
Basal Plane ◽  
Partial Dislocation ◽  
Stacking Faults ◽  
Dislocation Loops ◽  
Elastic Fields ◽  
Basal Plane Dislocation ◽  
The Stability ◽  
Shockley Dislocation ◽  
Polytype Structure

A model based on the generation and recombination of defect was developed to describe the stability of stacking faults and basal plane dislocation loops in crystals with layered polytype structures. The stability of the defects configuration was analysed for stacking faults surrounded by Shockley and Frank partial dislocation as well as Shockley dislocation dipoles with long range elastic fields. This approach allows the qualitative prediction of defect subsystems in polytype structure in external fields.

Influence of basal-plane dislocation structures on expansion of single Shockley-type stacking faults in forward-current degradation of 4H-SiC p–i–n diodes

2018 ◽  
Vol 57 (4S) ◽  
pp. 04FR07 ◽  
Author(s):  
Shohei Hayashi ◽  
Tamotsu Yamashita ◽  
Junji Senzaki ◽  
Masaki Miyazato ◽  
Mina Ryo ◽  
...  
Keyword(s):  
Basal Plane ◽  
Stacking Faults ◽  
Forward Current ◽  
Basal Plane Dislocation
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