Strain Engineering in Fully Depleted SOI MOSFETs: Is Bulk FinFET the Only Path to High Performance

2013 ◽  
Keyword(s):  
High Performance ◽  
Strain Engineering ◽  
Fully Depleted

scholarly journals Strain Investigation on Spin-Dependent Transport Properties of γ-Graphyne Nanoribbon Between Gold Electrodes

2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Yun Li ◽  
Xiaobo Li ◽  
Shidong Zhang ◽  
Liemao Cao ◽  
Fangping Ouyang ◽  
...  
Keyword(s):  
Transport Properties ◽  
High Performance ◽  
Density Functional ◽  
Strain Engineering ◽  
Molecular Junctions ◽  
Spin Splitting ◽  
Functional Theory ◽  
Spin Dependent Transport ◽  
The Density Functional Theory ◽  
Dependent Transport

AbstractStrain engineering has become one of the effective methods to tune the electronic structures of materials, which can be introduced into the molecular junction to induce some unique physical effects. The various γ-graphyne nanoribbons (γ-GYNRs) embedded between gold (Au) electrodes with strain controlling have been designed, involving the calculation of the spin-dependent transport properties by employing the density functional theory. Our calculated results exhibit that the presence of strain has a great effect on transport properties of molecular junctions, which can obviously enhance the coupling between the γ-GYNR and Au electrodes. We find that the current flowing through the strained nanojunction is larger than that of the unstrained one. What is more, the length and strained shape of the γ-GYNR serves as the important factors which affect the transport properties of molecular junctions. Simultaneously, the phenomenon of spin-splitting occurs after introducing strain into nanojunction, implying that strain engineering may be a new means to regulate the electron spin. Our work can provide theoretical basis for designing of high performance graphyne-based devices in the future.

Planar fully depleted SOI technology: The convergence of high performance and low power towards multimedia mobile applications

2012 ◽  
Author(s):  
Bertrand Pelloux-Prayer ◽  
Milovan Blagojevic ◽  
Olivier Thomas ◽  
Amara Amara ◽  
Andrei Vladimirescu ◽  
...  
Keyword(s):  
Low Power ◽  
Mobile Applications ◽  
High Performance ◽  
Fully Depleted ◽  
Soi Technology

scholarly journals Pressure-induced enhancement in the thermoelectric properties of monolayer and bilayer SnSe 2

2018 ◽  
Vol 5 (3) ◽  
pp. 171827 ◽  
Author(s):  
Daifeng Zou ◽  
Chuanbin Yu ◽  
Yuhao Li ◽  
Yun Ou ◽  
Yongyi Gao
Keyword(s):  
Electronic Structure ◽  
Thermoelectric Properties ◽  
High Performance ◽  
Transport Theory ◽  
Strain Engineering ◽  
External Pressure ◽  
Van Der Waals Interactions ◽  
Valuable Insight ◽  
Boltzmann Transport ◽  
Boltzmann Transport Theory

The electronic structures of monolayer and bilayer SnSe 2 under pressure were investigated by using first-principles calculations including van der Waals interactions. For monolayer SnSe 2 , the variation of electronic structure under pressure is controlled by pressure-dependent lattice parameters. For bilayer SnSe 2 , the changes in electronic structure under pressure are dominated by intralayer and interlayer atomic interactions. The n -type thermoelectric properties of monolayer and bilayer SnSe 2 under pressure were calculated on the basis of the semi-classical Boltzmann transport theory. It was found that the electrical conductivity of monolayer and bilayer SnSe 2 can be enhanced under pressure, and such dependence can be attributed to the pressure-induced changes of the Se–Sn antibonding states in conduction band. Finally, the doping dependence of power factors of n -type monolayer and bilayer SnSe 2 at three different pressures were estimated, and the results unveiled that thermoelectric performance of n -type monolayer and bilayer SnSe 2 can be improved by applying external pressure. This study benefits to understand the nature of the transport properties for monolayer and bilayer SnSe 2 under pressure, and it offers valuable insight for designing high-performance thermoelectric few-layered SnSe 2 through strain engineering induced by external pressure.

High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices

2006 ◽  
Vol 27 (5) ◽  
pp. 383-386 ◽  
Author(s):  
N. Singh ◽  
A. Agarwal ◽  
L.K. Bera ◽  
T.Y. Liow ◽  
R. Yang ◽  
...  
Keyword(s):  
High Performance ◽  
Silicon Nanowire ◽  
Nanowire Diameter ◽  
Fully Depleted

Impact of The Improved High Performance Si(110) Oriented MOSFETs by Using Accumulation-Mode Fully Depleted SOI Devices

2005 ◽  
Author(s):  
Cheng Weitao ◽  
Akinobu Teramoto ◽  
Masaki Hirayama ◽  
Shigetoshi Sugawa ◽  
Tadahiro Ohmi
Keyword(s):  
High Performance ◽  
Fully Depleted ◽  
Accumulation Mode ◽  
Soi Devices

High performance and highly reliable novel CMOS devices using accumulation mode multi-gate and fully depleted SOI MOSFETs

2007 ◽  
Vol 84 (9-10) ◽  
pp. 2105-2108 ◽  
Author(s):  
W. Cheng ◽  
A. Teramoto ◽  
R. Kuroda ◽  
M. Hirayama ◽  
T. Ohmi
Keyword(s):  
High Performance ◽  
Fully Depleted ◽  
Accumulation Mode
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