Effect of Atomic Hydrogen in SiNx Films for Gate Dielectric of Silicon-Based TFTs Fabricated at a Low-Temperature({less than or equal to} 150 °) by Cat-CVD

2011 ◽  
Keyword(s):  
Low Temperature ◽  
Atomic Hydrogen ◽  
Gate Dielectric ◽  
Silicon Based

Effect of Atomic Hydrogen in SiNx Films for Gate Dielectric of Silicon-Based TFTs Fabricated at a Low-Temperature(≤150 °) by Cat-CVD

2019 ◽  
Vol 35 (31) ◽  
pp. 73-76
Author(s):  
Ki-Su Keum ◽  
Kyoung-Min Lee ◽  
Jae-Dam Hwang ◽  
Kil-Sun No ◽  
Wan-Shick Hong
Keyword(s):  
Low Temperature ◽  
Atomic Hydrogen ◽  
Gate Dielectric ◽  
Silicon Based

Low-Temperature Post-Oxidation Annealing Using Atomic Hydrogen Radicals Generated by High-Temperature Catalyzer for Improvement in Reliability of Thermal Oxides on 4H-SiC

2006 ◽  
Vol 527-529 ◽  
pp. 999-1002
Author(s):  
Junji Senzaki ◽  
Atsushi Shimozato ◽  
Kenji Fukuda
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Atomic Hydrogen ◽  
High Reliability ◽  
Hydrogen Atmosphere ◽  
Exposed Sample ◽  
New Apparatus ◽  
Hydrogen Radical ◽  
Hydrogen Radicals ◽  
Sic Wafer

Low-temperature post-oxidation annealing (POA) process of high-reliability thermal oxides grown on 4H-SiC using new apparatus that generates atomic hydrogen radicals by high-temperature catalyzer has been investigated. Atomic hydrogen radicals were generated by thermal decomposition of H2 gas at the catalyzer surface heated at high temperature of 1800°C, and then exposed to the sample at 500°C in reactor pressure of 20 Pa. The mode and maximum values of field-to-breakdown are 11.0 and 11.2 MV/cm, respectively, for the atomic hydrogen radical exposed sample. In addition, the charge-to-breakdown at 63% cumulative failure of the thermal oxides for atomic hydrogen radical exposed sample was 0.51 C/cm2, which was higher than that annealed at 800°C in hydrogen atmosphere (0.39 C/cm2). Consequently, the atomic hydrogen radical exposure at 500°C has remarkably improved the reliability of thermal oxides on 4H-SiC wafer, and is the same effect with high-temperature hydrogen POA at 800°C.

scholarly journals Sol–Gel PMMA–ZrO2 Hybrid Layers as Gate Dielectric for Low-Temperature ZnO-Based Thin-Film Transistors

ACS Omega ◽  
2017 ◽  
Vol 2 (10) ◽  
pp. 6968-6974 ◽  
Author(s):  
Clemente G. Alvarado-Beltrán ◽  
Jorge L. Almaral-Sánchez ◽  
Israel Mejia ◽  
Manuel A. Quevedo-López ◽  
Rafael Ramirez-Bon
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Sol Gel ◽  
Hybrid Layers

Net negative charge in low-temperature SiO2 gate dielectric layers

2009 ◽  
Vol 86 (7-9) ◽  
pp. 1707-1710 ◽  
Author(s):  
A. Boogaard ◽  
A.Y. Kovalgin ◽  
R.A.M. Wolters
Keyword(s):  
Low Temperature ◽  
Negative Charge ◽  
Gate Dielectric ◽  
Dielectric Layers

scholarly journals Impact of Gate Dielectric in Carrier Mobility in Low Temperature Chalcogenide Thin Film Transistors for Flexible Electronics

2010 ◽  
Vol 13 (9) ◽  
pp. H313 ◽  
Author(s):  
A. L. Salas-Villasenor ◽  
I. Mejia ◽  
J. Hovarth ◽  
H. N. Alshareef ◽  
D. K. Cha ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Flexible Electronics ◽  
Thin Film Transistors ◽  
Carrier Mobility ◽  
Gate Dielectric ◽  
Chalcogenide Thin Film

scholarly journals Demonstration of AlGaN/GaN MISHEMT on Si with Low-Temperature Epitaxy Grown AlN Dielectric Gate

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1858
Author(s):  
Matthew Whiteside ◽  
Subramaniam Arulkumaran ◽  
Yilmaz Dikme ◽  
Abhinay Sandupatla ◽  
Geok Ing Ng
Keyword(s):  
Low Temperature ◽  
Gate Dielectric ◽  
Drain Current ◽  
High Electron Mobility Transistors ◽  
Interface State ◽  
State Density ◽  
High Electron ◽  
Gate Leakage ◽  
Annealing Effects ◽  
Low Temperature Epitaxy

AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMT) with a low-temperature epitaxy (LTE)-grown single crystalline AlN gate dielectric were demonstrated for the first time and the post-gate annealing effects at 400 °C were studied. The as-deposited LTE-AlN MISHEMT showed a maximum drain current (IDmax) of 708 mA/mm at a gate bias of 4 V and a maximum extrinsic transconductance (gmmax) of 129 mS/mm. The 400 °C annealed MISHEMT exhibited an increase of 15% in gmmax, an order of magnitude reduction in reverse gate leakage and about a 3% suppression of drain current (ID) collapse. The increase of gmmax by post-gate annealing is consistent with the increase of 2DEG mobility. The suppression of ID collapse and the reduction of gate leakage current is attributed to the reduction of interface state density (5.0 × 1011 cm−2eV−1) between the AlN/GaN interface after post-gate annealing at 400 °C. This study demonstrates that LTE grown AlN is a promising alternate material as gate dielectric for GaN-based MISHEMT application.

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