(Invited) High-K Dielectrics / High-Mobility Channel MOSFETs

2019 ◽  
Vol 41 (7) ◽  
pp. 101-108
Author(s):  
Jack Lee ◽  
Fei Xue ◽  
Yen-Ting Chen ◽  
Yanzhen Wang ◽  
Fei Zhou
Keyword(s):  
High Mobility ◽  
High K ◽  
High Mobility Channel

Bias Temperature Instability (BTI) in high-mobility channel devices with high-k dielectric stacks: SiGe, Ge, and InGaAs

MRS Advances ◽  
2016 ◽  
Vol 1 (49) ◽  
pp. 3329-3340 ◽  
Author(s):  
J. Franco ◽  
B. Kaczer ◽  
A. Vais ◽  
A. Alian ◽  
H. Arimura ◽  
...  
Keyword(s):  
Field Effect Transistors ◽  
High Mobility ◽  
Time Dependent ◽  
Gate Stack ◽  
Model Framework ◽  
Temperature Instability ◽  
Bias Temperature Instability ◽  
High K ◽  
Material Systems ◽  
High Mobility Channel

ABSTRACTWe present a review of our recent studies of Bias Temperature Instability (BTI) in Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) fabricated with different material systems, highlighting the reliability opportunities and challenges of each novel device family. We discuss first the intrinsic reliability improvement offered by SiGe and Gep-channel technologies, if a Si cap is used to passivate the channel, in order to fabricate a standard SiO2/HfO2gate stack. We focus on SiGe gate stack optimizations for maximum BTI reliability, and on a simple physics-based model able to reproduce the experimental trends. This model framework is then used to understand the suboptimal BTI reliability and excessive time-dependent variability induced by oxide defect charging in different high-mobility channel gate stacks, such as Ge/GeOx/high-k and InGaAs/high-k. Finally we discuss how to pursue a reduction of charge trapping in alternative material systems in order to boost the device reliability and minimize time-dependent variability.

High Mobility Channel Materials and Novel Devices for Scaling of Nanoelectronics beyond the Si Roadmap

2009 ◽  
Vol 1194 ◽  
Author(s):  
Marc Heyns ◽  
Florence Bellenger ◽  
Guy Brammertz ◽  
Matty Caymax ◽  
Stefan De Gendt ◽  
...  
Keyword(s):  
High Performance ◽  
Density Functional ◽  
High Mobility ◽  
Superior Performance ◽  
New Materials ◽  
New Device ◽  
High K ◽  
Wide Range ◽  
High Mobility Channel ◽  
Novel Devices

AbstractHigh mobility channel materials and new device structures will be needed to meet the power and performance specifications in future technology nodes. Therefore, the use of Ge and III/V materials and novel devices such as heterojunction TunnelFET’s is investigated for future CMOS applications. High-performance CMOS can be obtained by combining Ge pMOS devices with nMOS devices made on III/V compounds such as InGaAs. In all cases the key challenge is the electrical passivation of the interface between the high-k dielectric and the alternative channel materials. Recent studies have demonstrated good electrical properties of the GeO2/Ge interface. Since the GeO2 layer is very hygroscopic, full in-situ processing of GeO2 formation and high-k deposition must be performed or other methods must be employed to stabilize the GeO2 layer. One of the most successful passivation techniques for Ge MOS gate stacks is a thin, epitaxial layer of Si. A lot of attention went into better understanding of this passivation and the effects of its optimization on various device characteristics. It was found that mobility and Vt trends in both pMOS and nMOS transistors can be explained based on defects located at the Si/SiO2 interface. Unfortunately, III-V/oxide interfaces are not quite as robust and most interfaces present rather high densities of interface states. Although, considerable improvements have been realized in the reduction of the interface state density, further developments are required to obtain high performance MOS devices. To this purpose various passivation methods were critically evaluated. Simulations using Density Functional Theory reveal the possibility of using a thin amorphous layer made of GeOX to obtain an electrically unpinned gap. The major challenge resides in the control of the c-Ge thickness and the oxidation of this layer to avoid the diffusion of oxygen atoms at the Ge/GaAs(001) interface. Promising results are obtained by optimizing the surface preparation, high-k deposition and annealing cycle on In0.53Ga0.47As-Al2O3 interfaces. Self-aligned inversion channel n-MOSFETs fabricated on p-type In0.53Ga0.47As demonstrate inversion-mode operation with high drive current and a peak electron mobility of 3000 cm2/Vs. Since ultimately the major showstopper on the scaling roadmap is not device speed, but rather power density, the introduction of these advanced materials will have to go together with the introduction of new device concepts. Novel structures such as heterojunction TunnelFET’s can fully exploit the properties of these new materials and provide superior performance at lower power consumption by virtue of their improved subthreshold behaviour. Vertical surround gate devices produced from nanowires allow the introduction of a wide range of materials on Si. This illustrates the possibilities that are created by the combination of new materials and devices to allow scaling of nanoelectronics beyond the Si roadmap.

High Mobility ZnO thin film transistors using the novel deposition of high-k dielectrics

2011 ◽  
Vol 1315 ◽  
Author(s):  
D. K. Ngwashi ◽  
R. B. M. Cross ◽  
S. Paul ◽  
Andrian P. Milanov ◽  
Anjana Devi
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Performance Metrics ◽  
Chemical Vapour ◽  
High Mobility ◽  
Hafnium Dioxide ◽  
Organic Chemical ◽  
Channel Mobility ◽  
High K ◽  
Metal Organic

ABSTRACTIn order to investigate the performance of ZnO-based thin film transistors (ZnO-TFTs), we fabricate devices using amorphous hafnium dioxide (HfO2) high-k dielectrics. Sputtered ZnO was used as the active channel layer, and aluminium source/drain electrodes were deposited by thermal evaporation, and the HfO2 high-k dielectrics are deposited by metal-organic chemical vapour deposition (MOCVD). The ZnO-TFTs with high-k HfO2 gate insulators exhibit good performance metrics and effective channel mobility which is appreciably higher in comparison to SiO2-based ZnO TFTs fabricated under similar conditions. The average channel mobility, turn-on voltage, on-off current ratio and subthreshold swing of the high-k TFTs are 31.2 cm2V-1s-1, -4.7 V, ~103, and 2.4 V/dec respectively. We compared the characteristics of a typical device consisting of HfO2 to those of a device consisting of thermally grown SiO2 to examine their potential for use as high-k dielectrics in future TFT devices.

Investigation for the Feasibility of High-Mobility Channel in 3D NAND Memory

2018 ◽  
Vol 7 (5) ◽  
pp. Q75-Q79
Author(s):  
Zhaozhao Hou ◽  
Jiaxin Yao ◽  
Zhenhua Wu ◽  
Huaxiang Yin
Keyword(s):  
High Mobility ◽  
High Mobility Channel

Pioneering Application of Corona Charge-Kelvin Probe Metrology to Noncontact Characterization of In0.53 Ga0.47 As/Al2O3/HfO2 Stack

2014 ◽  
Vol 1691 ◽  
Author(s):  
Alexandre Savtchouk ◽  
John D’Amico ◽  
Marshall Wilson ◽  
Jacek Lagowski ◽  
Wei-E Wang ◽  
...  
Keyword(s):  
High Mobility ◽  
Dielectric Surface ◽  
Differential Capacitance ◽  
Voltage Response ◽  
Induced Voltage ◽  
Kelvin Probe ◽  
Dielectric Characterization ◽  
High K ◽  
Corona Charge

ABSTRACTWe report the first successful application of corona charging noncontact C-V and I-V metrology to interface and dielectric characterization of high-k/III-V structures. The metrology, which has been commonly used in Si IC manufacturing, uses incremental corona charge dosing, ΔQC, on the dielectric surface, and the measurement of surface voltage response, ΔVS, using a Kelvin-probe. Its application to In0.53Ga0.47As with a high-k stack required modifications related to the effects of dielectric trap induced voltage transients. The developed Corona Charge-Kelvin Probe Metrology adopted strictly differential measurements using ΔQC and ΔV, and corresponding differential capacitance rather than measurements based on total global charge, Q, and voltage, V, values.Electrical characterization data including interface trap density, electrical oxide thickness, and dielectric leakage are presented for a sample containing an In0.53 Ga0.47 As channel overlaid with a bilayer (2nm Al2O3/5nm HfO2) dielectric stack that is considered to be very promising for application in performance NFETs with high-mobility channels.

EHD-jet patterned MoS2 on a high-k dielectric for high mobility in thin film transistor applications

2021 ◽  
Vol 32 (24) ◽  
pp. 245710
Author(s):  
Thi Thu Thuy Can ◽  
Hak-Lim Ko ◽  
Woon-Seop Choi
Keyword(s):  
Thin Film ◽  
Thin Film Transistor ◽  
High Mobility ◽  
High K ◽  
High K Dielectric
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