(Invited) High Performance and Highly Uniform Metal Hi-K Gate-All-Around Silicon Nanowire MOSFETs

2019 ◽  
Vol 28 (1) ◽  
pp. 179-189 ◽  
Author(s):  
Jeffrey W. Sleight ◽  
Sarunya Bangsaruntip ◽  
Guy Cohen ◽  
Amlan Majumdar ◽  
Ying Zhang ◽  
...  
Keyword(s):  
High Performance ◽  
Silicon Nanowire ◽  
Nanowire Mosfets ◽  
Highly Uniform

Room-temperature carrier transport in high-performance short-channel Silicon nanowire MOSFETs

2012 ◽  
Author(s):  
Amlan Majumdar ◽  
Sarunya Bangsaruntip ◽  
Guy M. Cohen ◽  
Lynne M. Gignac ◽  
Michael Guillorn ◽  
...  
Keyword(s):  
High Performance ◽  
Carrier Transport ◽  
Room Temperature ◽  
Silicon Nanowire ◽  
Short Channel ◽  
Nanowire Mosfets

Transport through single dopants in gate-all-around silicon nanowire MOSFETs (SNWFETs)

2008 ◽  
Author(s):  
B. H. Hong ◽  
Y. C. Jung ◽  
S. W. Hwang ◽  
K. H. Cho ◽  
K. H. Yeo ◽  
...  
Keyword(s):  
Silicon Nanowire ◽  
Nanowire Mosfets

scholarly journals Investigation of source-to-drain capacitance by DIBL effect of silicon nanowire MOSFETs

2010 ◽  
Vol 7 (19) ◽  
pp. 1499-1503 ◽  
Author(s):  
Seongjae Cho ◽  
In Man Kang ◽  
Kyung Rok Kim
Keyword(s):  
Silicon Nanowire ◽  
Nanowire Mosfets

NAND And NOR Logic-In-Memory Comprising Silicon Nanowire Feedback Field-Effect Transistors

2021 ◽  
Author(s):  
Yejin Yang ◽  
Juhee Jeon ◽  
Jaemin Son ◽  
Kyoungah Cho ◽  
Sangsig Kim
Keyword(s):  
Processing Speed ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Silicon Nanowire ◽  
Logic Gate ◽  
High Energy ◽  
Zero Bias ◽  
Computing Systems ◽  
Data Movement

Abstract The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindrance, logic-in-memory (LIM) has been proposed that performs both data processing and memory operations. Here, we present a NAND and NOR LIM composed of silicon nanowidre feedback field-effect transistors, whose configuration resembles that of CMOS logic gate circuits. The LIM can perform memory operations to retain its output logic under zero-bias conditions as well as logic operations with a high processing speed of nanoseconds. The newly proposed dynamic voltage-transfer characteristics verify the operating principle of the LIM. This study demonstrates that the NAND and NOR LIM has promising potential to resolve power and processing speed issues.

Band Structure Effects in Extremely Scaled Silicon Nanowire MOSFETs With Different Cross Section Shapes

2015 ◽  
Vol 62 (11) ◽  
pp. 3547-3553 ◽  
Author(s):  
Yawei Lv ◽  
Hao Wang ◽  
Sheng Chang ◽  
Jin He ◽  
Qijun Huang
Keyword(s):  
Band Structure ◽  
Cross Section ◽  
Silicon Nanowire ◽  
Nanowire Mosfets

Large-area and highly uniform carbon nanotube film for high-performance thin film transistors

Nano Research ◽  
2018 ◽  
Vol 11 (8) ◽  
pp. 4356-4367 ◽  
Author(s):  
Guodong Dong ◽  
Jie Zhao ◽  
Lijun Shen ◽  
Jiye Xia ◽  
Hu Meng ◽  
...  
Keyword(s):  
Thin Film ◽  
Carbon Nanotube ◽  
Thin Film Transistors ◽  
High Performance ◽  
Large Area ◽  
Carbon Nanotube Film ◽  
Highly Uniform

scholarly journals High Performance GAA SNWT with a Triangular Cross Section: Simulation and Experiments

2018 ◽  
Vol 8 (9) ◽  
pp. 1553 ◽  
Author(s):  
Ming Li ◽  
Gong Chen ◽  
Ru Huang
Keyword(s):  
Cross Section ◽  
High Performance ◽  
Silicon Nanowire ◽  
Wet Etching ◽  
Excellent Performance ◽  
Cross Sectional ◽  
Triangular Cross Section ◽  
Tcad Simulation ◽  
Equivalent Distance ◽  
20 Nm

In this paper, we present a gate-all-around silicon nanowire transistor (GAA SNWT) with a triangular cross section by simulation and experiments. Through the TCAD simulation, it was found that with the same nanowire width, the triangular cross-sectional SNWT was superior to the circular or quadrate one in terms of the subthreshold swing, on/off ratio, and SCE immunity, which resulted from the smallest equivalent distance from the nanowire center to the surface in triangular SNWTs. Following this, we fabricated triangular cross-sectional GAA SNWTs with a nanowire width down to 20 nm by TMAH wet etching. This process featured its self-stopped etching behavior on a silicon (1 1 1) crystal plane, which made the triangular cross section smooth and controllable. The fabricated triangular SNWT showed an excellent performance with a large Ion/Ioff ratio (~107), low SS (85 mV/dec), and preferable DIBL (63 mV/V). Finally, the surface roughness mobility of the fabricated device at a low temperature was also extracted to confirm the benefit of a stable cross section.

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