Weakening of Hardness and Modulus of the Si Lattice by Hydrogen Implantation for Layer Transfer in Wafer Bonding Technology

2019 ◽  
Vol 16 (8) ◽  
pp. 385-391
Author(s):  
Diefeng Gu ◽  
H. Baumgart ◽  
Konstantin Bourdelle ◽  
George K. Celler ◽  
Abdelmageed Elmustafa
1996 ◽  
Vol 446 ◽  
Author(s):  
A.J. Auberton‐Hervé ◽  
T. Barge ◽  
F. Metral ◽  
M. Bruel ◽  
B. Aspar ◽  
...  

AbstractThe advantage of SOI wafers for device manufacture has been widely studied. To be a real challenger to bulk silicon, SOI producers have to offer SOI wafers in large volume and at low cost. The new Smart‐Cut® SOI process used for the manufacture of the Unibond® SOI wafers answers most of the SOI wafer manufacturability issues. The use of Hydrogen implantation and wafer bonding technology is the best combination to get good uniformity and high quality for both the SOI and buried oxide layer. In this paper, the Smart‐Cut® process is described in detail and material characteristics of Unibond® wafers such as crystalline quality, surface roughness, thin film thickness homogeneity, and electric behavior.


1999 ◽  
Vol 574 ◽  
Author(s):  
M. Alexe ◽  
P. Kopperschmidt ◽  
U. Gösele ◽  
Qin-Yi Tong ◽  
Li-Juan Huang

AbstractThe present paper proposes a simple method which may be able to provide true single-crystal films of complex oxides on large substrates including semiconductors like silicon or gallium arsenide. The method describes a layer transfer process using layer splitting by hydrogen implantation and direct wafer bonding (DWB) to obtain single-crystal oxide films on different substrates. Alternatively, a fabrication process of ferroelectric-semiconductor heterostructures based on direct wafer bonding and layer transfer is also described. This process is an alternative method to the direct deposition of oxides films (ferroelectric, high-k) on silicon and allows fabrication of metal oxide-silicon heterostructures with an interface having a good structural quality as well as a low trap density.


2013 ◽  
Author(s):  
U. Dadwal ◽  
S. Chandra ◽  
P. Kumar ◽  
D. Kanjilal ◽  
R. Singh

2006 ◽  
Vol 89 (19) ◽  
pp. 192109 ◽  
Author(s):  
Alin Mihai Fecioru ◽  
Stephan Senz ◽  
Roland Scholz ◽  
Ulrich Gösele

2016 ◽  
Vol 75 (9) ◽  
pp. 345-353 ◽  
Author(s):  
F. Kurz ◽  
T. Plach ◽  
J. Suss ◽  
T. Wagenleitner ◽  
D. Zinner ◽  
...  

Author(s):  
Kenta Nakazawa ◽  
Takashi Sasaki ◽  
Hiromasa Furuta ◽  
Jiro Kamiya ◽  
Hideki Sasaki ◽  
...  

2013 ◽  
Vol 2013 (DPC) ◽  
pp. 001009-001032
Author(s):  
Mark Oliver ◽  
Jong-Uk Kim ◽  
Michael Gallagher ◽  
Zidong Wang ◽  
Janet Okada ◽  
...  

Temporary wafer bonding has emerged as the method of choice for handling silicon wafers during the thinning and high-temperature backside processing required for the manufacture of 3D device structures. Among the requirements for temporary wafer bonding materials to be used in high volume manufacturing are simple device and carrier wafer preparation, high-throughput wafer bonding, excellent thermal stability, and clean room-temperature release directly from the device wafer. We will present successful temporary wafer bonding using a new BCB (benzocyclobutene)-based material that can meet these requirements. For this temporary wafer bonding technology, wafer preparation involves spin coating the device wafer with the BCB-based adhesive to a thickness of up to 100 μm and spin coating the carrier wafer with an adhesion promoter. The wafers can then be bonded at temperatures as low as 80 °C for as short as 30 seconds. The low bonding temperature means the wafers can be loaded into a preheated wafer bonding tool, eliminating the time needed to heat and cool the bonding chucks during the bonding cycle. Also, no curing of the material is required during the bonding, enabling a short process time and high wafer throughput. Curing of the adhesive is done as a batch oven cure at 210 °C for one hour after which the material is stable enough for backside processes up to 300 °C. The material has been designed to adhere well to the carrier wafer and debond directly from the device wafer without any chemical or radiation pretreatment, leaving a clean device wafer surface in need of only mild cleaning before further processing.


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