Electrical Characteristics of LaAlO[sub 3] Gate Dielectrics Prepared by High-Pressure Hydrogen Post-Deposition Annealing

2006 ◽  
Vol 9 (11) ◽  
pp. F77 ◽  
Author(s):  
Musarrat Hasan ◽  
Min Seok Jo ◽  
Md. Shahriar Rahman ◽  
Hyejong Choi ◽  
Sungho Heo ◽  
...  
Keyword(s):  
High Pressure ◽  
Gate Dielectrics ◽  
Electrical Characteristics ◽  
Post Deposition Annealing ◽  
Post Deposition ◽  
Pressure Hydrogen

Effect of the post-deposition annealing on electrical characteristics of MIS structures with HfO2/SiO2 gate dielectric stacks

2012 ◽  
Vol 177 (15) ◽  
pp. 1281-1285 ◽  
Author(s):  
Andrzej Taube ◽  
Robert Mroczyński ◽  
Katarzyna Korwin-Mikke ◽  
Sylwia Gierałtowska ◽  
Jan Szmidt ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Electrical Characteristics ◽  
Post Deposition Annealing ◽  
Post Deposition ◽  
Mis Structures

Effect of Al2O3 Deposition and Subsequent Annealing on Passivation of Defects in Ge-Rich SiGe-on-Insulator

2011 ◽  
Vol 470 ◽  
pp. 79-84
Author(s):  
Hai Gui Yang ◽  
Masatoshi Iyota ◽  
Shogo Ikeura ◽  
Dong Wang ◽  
Hiroshi Nakashima
Keyword(s):  
Field Effect Transistor ◽  
Surface Reaction ◽  
Hole Concentration ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Characteristics ◽  
Post Deposition Annealing ◽  
Back Gate ◽  
Effect Transistor ◽  
Post Deposition

Al2O3 deposition and subsequent post-deposition annealing (Al2O3-PDA) is proposed as an effective method to passivate electrically active defects in Ge-rich SiGe-on-insulator (SGOI) substrates. We found that Al2O3-PDA could not only suppress the surface reaction during Al-PDA, but could also effectively reduce the defect-induced acceptor and hole concentration in Ge-rich SGOI. Al2O3-PDA greatly improves the electrical characteristics of a back-gate metal-oxide-semiconductor field-effect transistor fabricated on Ge-rich SGOI.

Effects of Oxygen and Forming Gas Annealing on ZnO TFTs

2011 ◽  
Vol 1287 ◽  
Author(s):  
Jiaye Huang ◽  
Ujwal Radhakrishna ◽  
Martin Lemberger ◽  
Michael P.M. Jank ◽  
Sebastian Polster ◽  
...  
Keyword(s):  
Annealing Temperature ◽  
Morphological Changes ◽  
Electrical Characteristics ◽  
Electrical Parameters ◽  
Post Deposition Annealing ◽  
Oxygen Annealing ◽  
Hydrogen Incorporation ◽  
Post Deposition ◽  
Additional Hydrogen ◽  
Bottom Gate

ABSTRACTZnO TFTs with bottom gate top S/D contact architecture were fabricated by sputtering of ZnO with layer thicknesses from 30 nm to 100 nm. The effect of post deposition annealing in oxygen and forming gas atmospheres at 400°C to 500°C on the devices was investigated. The tendencies of a lower threshold voltage Vth and a higher saturation mobility μsat for higher annealing temperature can be observed for both oxygen and forming gas annealing. Reduction of trap density in oxygen annealing and additional hydrogen incorporation in forming gas annealing play an important role for these electrical parameters. Morphological changes of increased grain size and fewer grain boundaries in the channel also contribute to tendencies in electrical characteristics of ZnO TFTs.

Electrical Characteristics of Crystalline Gd2O3 Film on Si (111): Impacts of Growth Temperature and Post Deposition Annealing

2010 ◽  
Vol 1252 ◽  
Author(s):  
Gang Niu ◽  
Bertrand Vilquin ◽  
Nicolas Baboux ◽  
Guillaume Saint-Girons ◽  
Carole Plossu ◽  
...  
Keyword(s):  
Molecular Beam ◽  
Defect Density ◽  
Oxide Thickness ◽  
Electrical Characteristics ◽  
Equivalent Oxide Thickness ◽  
Optimal Temperature ◽  
Post Deposition Annealing ◽  
High K ◽  
Electrical Characterizations ◽  
Post Deposition

AbstractThis work reports on the epitaxial growth of crystalline high-k Gd2O3 on Si (111) by Molecular Beam Epitaxy (MBE) for CMOS gate application. Epitaxial Gd2O3 films of different thicknesses have been deposited on Si (111) between 650°C~750°C. Electrical characterizations reveal that the sample grown at the optimal temperature (700°C) presents an equivalent oxide thickness (EOT) of 0.73nm with a leakage current density of 3.6×10-2 A/cm2 at |Vg-VFB|=1V. Different Post deposition Annealing (PDA) treatments have been performed for the samples grown under optimal condition. The Gd2O3 films exhibit good stability and the PDA process can effectively reduce the defect density in the oxide layer, which results in higher performances of the Gd2O3/Si (111) capacitor.

Improved Electrical Characteristics of Fully Depleted Ultrathin SOI MOSFETs Annealed in High-Pressure Hydrogen Ambient

2007 ◽  
Vol 10 (11) ◽  
pp. H324 ◽  
Author(s):  
Yunik Son ◽  
Man Chang ◽  
Hokyung Park ◽  
Md. Shahriar Rahman ◽  
Sungkwon Baek ◽  
...  
Keyword(s):  
High Pressure ◽  
Electrical Characteristics ◽  
Fully Depleted ◽  
Ultrathin Soi ◽  
Pressure Hydrogen

ScN/sub x/ gate on atomic layer deposited HfO/sub 2/ and effect of high-pressure wet post deposition annealing

2006 ◽  
Vol 27 (6) ◽  
pp. 435-438 ◽  
Author(s):  
Hyundoek Yang ◽  
Dongsoo Lee ◽  
M.S. Rahman ◽  
M. Hasan ◽  
Hyung-Seok Jung ◽  
...  
Keyword(s):  
High Pressure ◽  
Atomic Layer ◽  
Post Deposition Annealing ◽  
Post Deposition
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