Evaluation of Electrical Characteristics and Trap-State Density in Bottom-Gate Polycrystalline Thin Film Transistors Processed with High-Pressure Water Vapor Annealing

2006 ◽  
Vol 45 (2A) ◽  
pp. 660-665 ◽  
Author(s):  
Masafumi Kunii
Keyword(s):  
Thin Film ◽  
High Pressure ◽  
Thin Film Transistors ◽  
State Density ◽  
Electrical Characteristics ◽  
Trap State ◽  
Polycrystalline Thin Film ◽  
Vapor Annealing ◽  
Pressure Water ◽  
Bottom Gate

The Effects of Nanometal-Induced Crystallization on the Electrical Characteristics of Bottom-Gate Poly-Si Thin-Film Transistors

2011 ◽  
Vol 11 (7) ◽  
pp. 5612-5617 ◽  
Author(s):  
I-Che Lee ◽  
Po-Yu Yang ◽  
Ming-Jhe Hu ◽  
Jyh-Liang Wang ◽  
Chun-Chien Tsai ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Electrical Characteristics ◽  
Induced Crystallization ◽  
Si Thin Film ◽  
Bottom Gate

Bottom-Gate Thin-Film Transistors Fabricated by Excimer Laser Annealing

2013 ◽  
Vol 811 ◽  
pp. 177-180
Author(s):  
Jyh Liang Wang ◽  
Chun Chien Tsai ◽  
Chuan Chou Hwang ◽  
Tsang Yen Hsieh
Keyword(s):  
Thin Film ◽  
Excimer Laser ◽  
Thin Film Transistors ◽  
High Performance ◽  
Laser Annealing ◽  
Electrical Characteristics ◽  
Laser Crystallization ◽  
Excimer Laser Annealing ◽  
Excimer Laser Crystallization ◽  
Bottom Gate

High performance and device uniformity n-channel low-temperature poly-silicon (LTPS) bottom-gate (BG) thin film transistors (TFTs) with artificially-controlled lateral grain growth have been performed by excimer laser crystallization (ELC). The BG TFTs (W/L = 1.5 μm/1.5 μm) demonstrate field-effect-mobility of 323 cm2/Vs and high Ion/Ioff of 9.5 × 108. The proposed BG TFTs reveal the superior electrical characteristics, device uniformity, and reliability than conventional top-gate ones.

Analysis of Electron Traps in a-IGZO Thin Films after High Pressure Vapor Annealing by Capacitance–Voltage Method

2012 ◽  
Vol 1436 ◽  
Author(s):  
Yoshihiro Ueoka ◽  
Mami Fujii ◽  
Haruka Yamazaki ◽  
Masahiro Horita ◽  
Yasuaki Ishikawa ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
High Pressure ◽  
Electron Trap ◽  
Trap Density ◽  
The Other ◽  
Density Of State ◽  
Vapor Annealing ◽  
Capacitance Voltage ◽  
Pressure Water

ABSTRACTEffect of high-pressure water vapor (HPV) annealing is discussed from density of state (DOS) by capacitance–voltage (C–V) method and ΔVFB by the cyclic C–V measurement. The DOS of HPV samples were smaller than that of conventional atmosphere (AT) annealing around conduction band minimum (Ec). The ΔVFB of HPV samples were also smaller than that of AT. This suggests that HPV annealing is an effective method to decrease electron trap density as compared with AT condition. Especially, HPV 0.5 MPa sample was lower electron trap density and more stable than the other pressure HPV samples. Therefore, it is considered that the HPV in 0.5 MPa is the most promising condition. In addition, we succeeded in demonstrating the analysis of trap density in thin film by C–V method and cyclic C–V measurement.

Low-Temperature Formation of SiNx Gate Insulator for Thin-Film Transistor Using CAT-CVD Method

1998 ◽  
Vol 508 ◽  
Author(s):  
A. Izumi ◽  
T. Ichise ◽  
H. Matsumura
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Silicon Nitride ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
State Density ◽  
Gate Insulator ◽  
Catalytic Chemical Vapor Deposition ◽  
Silicon Nitride Films

AbstractSilicon nitride films prepared by low temperatures are widely applicable as gate insulator films of thin film transistors of liquid crystal displays. In this work, silicon nitride films are formed around 300 °C by deposition and direct nitridation methods in a catalytic chemical vapor deposition system. The properties of the silicon nitride films are investigated. It is found that, 1) the breakdown electric field is over 9MV/cm, 2) the surface state density is about 1011cm−2eV−1 are observed in the deposition films. These result shows the usefulness of the catalytic chemical vapor deposition silicon nitride films as gate insulator material for thin film transistors.

scholarly journals Analysis of Threshold Voltage Shift for Full VGS/VDS/Oxygen-Content Span under Positive Bias Stress in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 327
Author(s):  
Je-Hyuk Kim ◽  
Jun Tae Jang ◽  
Jong-Ho Bae ◽  
Sung-Jin Choi ◽  
Dong Myong Kim ◽  
...  
Keyword(s):  
Thin Film ◽  
Electric Field ◽  
Oxygen Content ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Electron Trapping ◽  
Threshold Voltage Shift ◽  
Voltage Shift ◽  
Drain Side ◽  
Bottom Gate

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.

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