Development Of A Three-Dimensional Circuit Integration Technology And Computer Architecture

1981 ◽  
Author(s):  
R. D. Etchells ◽  
J. Grinberg ◽  
G. R. Nudd
Keyword(s):  
Computer Architecture ◽  
Three Dimensional ◽  
Integration Technology ◽  
Circuit Integration

Three-Dimensional Integration Technology for Advanced Focal Planes

2008 ◽  
Vol 1112 ◽  
Author(s):  
Craig Lewis Keast ◽  
Brian Aull ◽  
James Burns ◽  
Chenson Chen ◽  
Jeff Knecht ◽  
...  
Keyword(s):  
Focal Plane ◽  
Three Dimensional ◽  
Focal Plane Arrays ◽  
Silicon On Insulator ◽  
Wafer Level ◽  
Integration Technology ◽  
Electrical Interconnection ◽  
Circuit Integration ◽  
Micrometer Scale ◽  
Soi Technology

AbstractWe have developed a three-dimensional (3D) circuit integration technology that exploits the advantages of silicon-on-insulator (SOI) technology to enable wafer-level stacking and micrometer-scale electrical interconnection of fully fabricated circuit wafers. This paper describes the 3D technology and discusses some of the advanced focal plane arrays that have been built using it.

Lincoln Laboratory's 3D Circuit Integration Technology

2008 ◽  
pp. 393-411
Author(s):  
James Burns ◽  
Brian Aull ◽  
Robert Berger ◽  
Nisha Checka ◽  
Chang‐Lee Chen ◽  
...  
Keyword(s):  
Integration Technology ◽  
Circuit Integration

scholarly journals Fully epitaxial giant magnetoresistive devices with half-metallic Heusler alloy fabricated on poly-crystalline electrode using three-dimensional integration technology

2020 ◽  
Vol 200 ◽  
pp. 1038-1045
Author(s):  
Jiamin Chen ◽  
Yuya Sakuraba ◽  
Kay Yakushiji ◽  
Yuichi Kurashima ◽  
Naoya Watanabe ◽  
...  
Keyword(s):  
Heusler Alloy ◽  
Three Dimensional ◽  
Half Metallic ◽  
Integration Technology

An SOI-Based 3D Circuit Integration Technology

2008 ◽  
pp. 1-26
Author(s):  
James Burns ◽  
Brian Aull ◽  
Robert Berger ◽  
Nisha Checka ◽  
Chang-Lee Chen ◽  
...  
Keyword(s):  
Integration Technology ◽  
Circuit Integration
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