Progress of hard mask material for multi-layer stack application

2007 ◽  
Author(s):  
Hisanobu Harada ◽  
Koji Yonemura ◽  
Takeshi Tanaka ◽  
Daisuke Kawana ◽  
Naoki Yamashita ◽  
...  
Keyword(s):  
Hard Mask ◽  
Mask Material

New silicon hard mask material development for sub-5nm node

2019 ◽  
Author(s):  
Tomoaki Seko ◽  
Tatsuya Kasai ◽  
Ryuuichi Serizawa ◽  
Satoshi Dei ◽  
Tatsuya Sakai
Keyword(s):  
Hard Mask ◽  
Material Development ◽  
Mask Material

Impact of Sacrificial Hard Mask Material in BEOL Integration in Advanced Technology

2019 ◽  
Author(s):  
Eswar Ramanathan ◽  
Henrik Johanson ◽  
Daniel Damjanovic ◽  
ZhiGuo Sun ◽  
Anirvan Sircar ◽  
...  
Keyword(s):  
Advanced Technology ◽  
Hard Mask ◽  
Mask Material

Dual-Damascene Cu/Low-k Interconnect Fabrication Scheme Using Dissoluble Hard Mask Material

2006 ◽  
Vol 153 (2) ◽  
pp. G160 ◽  
Author(s):  
Takeshi Furusawa ◽  
Shuntaro Machida ◽  
Daisuke Ryuzaki ◽  
Kenji Sameshima ◽  
Takeshi Ishida ◽  
...  
Keyword(s):  
Hard Mask ◽  
Dual Damascene ◽  
Mask Material ◽  
Low K

Failure Analysis Due to Slightly Unetched Hard Mask Using Nano Probe

2013 ◽  
Author(s):  
Jong Hak Lee ◽  
Jong Eun Kim ◽  
Chang Su Park ◽  
Nam Il Kim ◽  
Jang Won Moon ◽  
...  
Keyword(s):  
Leakage Current ◽  
Circuit Simulation ◽  
The State ◽  
Physical Analysis ◽  
Cross Sectional ◽  
Hard Mask ◽  
Current Flows ◽  
Voltage Contrast ◽  
The One ◽  
Zero Voltage

Abstract In this work, a slightly unetched gate hard mask failure was analyzed by nano probing. Although unetched hard mask failures are commonly detected from the cross sectional view with FIB or FIB-TEM and planar view with the voltage contrast, in this case of the very slightly unetched hard mask, it was difficult to find the defects within the failed area by physical analysis methods. FIB is useful due to its function of milling and checking from the one region to another region within the suspected area, but the defect, located under contact was very tiny. So, it could not be detected in the tilted-view of the FIB. However, the state of the failure could be understood from the electrical analysis using a nano probe due to its ability to probe contact nodes across the fail area. Among the transistors in the fail area, one transistor’s characteristics showed higher leakage current and lower ON current than expected. After physical analysis, slightly remained hard mask was detected by TEM. Chemical processing was followed to determine the gate electrode (WSi2) connection to tungsten contact. It was also proven that when gate is floated, more leakage current flows compared to the state that the zero voltage is applied to the gate. This was not verified by circuit simulation due to the floating nodes.

Root Cause Analysis for Pin Leakage

2016 ◽  
Author(s):  
Zhigang Song ◽  
Jochonia Nxumalo ◽  
Manuel Villalobos ◽  
Sweta Pendyala
Keyword(s):  
Failure Analysis ◽  
Root Cause Analysis ◽  
Advanced Technology ◽  
Process Step ◽  
Cause Analysis ◽  
Hard Mask ◽  
Technology Node ◽  
Root Cause ◽  
Tools And Techniques

Abstract Pin leakage continues to be on the list of top yield detractors for microelectronics devices. It is simply manifested as elevated current with one pin or several pins during pin continuity test. Although many techniques are capable to globally localize the fault of pin leakage, root cause analysis and identification for it are still very challenging with today’s advanced failure analysis tools and techniques. It is because pin leakage can be caused by any type of defect, at any layer in the device and at any process step. This paper presents a case study to demonstrate how to combine multiple techniques to accurately identify the root cause of a pin leakage issue for a device manufactured using advanced technology node. The root cause was identified as under-etch issue during P+ implantation hard mask opening for ESD protection diode, causing P+ implantation missing, which was responsible for the nearly ohmic type pin leakage.

scholarly journals Formation of SiO2 hard mask using dry etching and nanosphere lithography

2020 ◽  
Vol 1697 ◽  
pp. 012188
Author(s):  
E A Vyacheslavova ◽  
I A Morozov ◽  
D A Kudryashov ◽  
A S Gudovskikh
Keyword(s):  
Nanosphere Lithography ◽  
Dry Etching ◽  
Hard Mask

Study for aluminum metal patterning process with oxide hard mask in 90-nm s-flash memory device fabrication

2008 ◽  
Author(s):  
Sang Il Hwang ◽  
Ki Jun Yun ◽  
Sang Wook Ryu ◽  
Kang Hyun Lee ◽  
Jae Won Han
Keyword(s):  
Flash Memory ◽  
Memory Device ◽  
Device Fabrication ◽  
Hard Mask ◽  
Aluminum Metal

scholarly journals A direct-write, resistless hard mask for rapid nanoscale patterning of diamond

2011 ◽  
Vol 20 (5-6) ◽  
pp. 707-710 ◽  
Author(s):  
Warren McKenzie ◽  
John Pethica ◽  
Graham Cross
Keyword(s):  
Direct Write ◽  
Hard Mask ◽  
Nanoscale Patterning
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