Simulation-based design of a pixel for back-side-illuminated CMOS image sensor with thick photo-electric conversion element

Author(s):  
Toshiki Arai ◽  
Hiroshi Shimamoto
2020 ◽  
Vol 67 (5) ◽  
pp. 2022-2027
Author(s):  
Andrea Vici ◽  
Felice Russo ◽  
Nicola Lovisi ◽  
Fernanda Irrera

2009 ◽  
Author(s):  
N. Watanabe ◽  
I. Tsunoda ◽  
T. Takao ◽  
K. Tanaka ◽  
T. Asano

Author(s):  
Tanemasa Asano ◽  
Naoya Watanabe ◽  
Isao Tsunoda ◽  
Yasuhiro Kimiya ◽  
Katsuaki Fukunaga ◽  
...  

Sensors ◽  
2020 ◽  
Vol 20 (2) ◽  
pp. 486
Author(s):  
Ken Miyauchi ◽  
Kazuya Mori ◽  
Toshinori Otaka ◽  
Toshiyuki Isozaki ◽  
Naoto Yasuda ◽  
...  

A backside-illuminated complementary metal-oxide-semiconductor (CMOS) image sensor with 4.0 μm voltage domain global shutter (GS) pixels has been fabricated in a 45 nm/65 nm stacked CMOS process as a proof-of-concept vehicle. The pixel components for the photon-to-voltage conversion are formed on the top substrate (the first layer). Each voltage signal from the first layer pixel is stored in the sample-and-hold capacitors on the bottom substrate (the second layer) via micro-bump interconnection to achieve a voltage domain GS function. The two sets of voltage domain storage capacitor per pixel enable a multiple gain readout to realize single exposure high dynamic range (SEHDR) in the GS operation. As a result, an 80dB SEHDR GS operation without rolling shutter distortions and motion artifacts has been achieved. Additionally, less than −140dB parasitic light sensitivity, small noise floor, high sensitivity and good angular response have been achieved.


2010 ◽  
Author(s):  
T. Arai ◽  
T. Hayashida ◽  
K. Kitamura ◽  
J. Yonai ◽  
H. Maruyama ◽  
...  

Author(s):  
Geunsook Park ◽  
Lindsay A. Grant ◽  
Alan Chih-Wei Hsuing ◽  
Keiji Mabuchi ◽  
Jingming Yao ◽  
...  

2012 ◽  
Author(s):  
Xinyang Wang ◽  
Bram Wolfs ◽  
Jan Bogaerts ◽  
Guy Meynants ◽  
Ali BenMoussa

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