Compliant bump technology for back-side illuminated CMOS image sensor

2009 ◽  
Author(s):  
Tanemasa Asano ◽  
Naoya Watanabe ◽  
Isao Tsunoda ◽  
Yasuhiro Kimiya ◽  
Katsuaki Fukunaga ◽  
...  
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Back Side

scholarly journals On Border Traps in Back-Side-Illuminated CMOS Image Sensor Oxides

2020 ◽  
Vol 67 (5) ◽  
pp. 2022-2027
Author(s):  
Andrea Vici ◽  
Felice Russo ◽  
Nicola Lovisi ◽  
Fernanda Irrera
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Back Side

Back-Side Illuminated CMOS Image Sensor Fabricated using Compliant Bump

2009 ◽  
Author(s):  
N. Watanabe ◽  
I. Tsunoda ◽  
T. Takao ◽  
K. Tanaka ◽  
T. Asano
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Back Side

scholarly journals A Stacked Back Side-Illuminated Voltage Domain Global Shutter CMOS Image Sensor with a 4.0 μm Multiple Gain Readout Pixel

Sensors ◽  
2020 ◽  
Vol 20 (2) ◽  
pp. 486
Author(s):  
Ken Miyauchi ◽  
Kazuya Mori ◽  
Toshinori Otaka ◽  
Toshiyuki Isozaki ◽  
Naoto Yasuda ◽  
...  
Keyword(s):  
Dynamic Range ◽  
High Sensitivity ◽  
Cmos Image Sensor ◽  
Light Sensitivity ◽  
Image Sensor ◽  
Motion Artifacts ◽  
Oxide Semiconductor ◽  
Storage Capacitor ◽  
Cmos Process ◽  
Back Side

A backside-illuminated complementary metal-oxide-semiconductor (CMOS) image sensor with 4.0 μm voltage domain global shutter (GS) pixels has been fabricated in a 45 nm/65 nm stacked CMOS process as a proof-of-concept vehicle. The pixel components for the photon-to-voltage conversion are formed on the top substrate (the first layer). Each voltage signal from the first layer pixel is stored in the sample-and-hold capacitors on the bottom substrate (the second layer) via micro-bump interconnection to achieve a voltage domain GS function. The two sets of voltage domain storage capacitor per pixel enable a multiple gain readout to realize single exposure high dynamic range (SEHDR) in the GS operation. As a result, an 80dB SEHDR GS operation without rolling shutter distortions and motion artifacts has been achieved. Additionally, less than −140dB parasitic light sensitivity, small noise floor, high sensitivity and good angular response have been achieved.

A 2.2μm stacked back side illuminated voltage domain global shutter CMOS image sensor

2019 ◽  
Author(s):  
Geunsook Park ◽  
Lindsay A. Grant ◽  
Alan Chih-Wei Hsuing ◽  
Keiji Mabuchi ◽  
Jingming Yao ◽  
...  
Keyword(s):  
Cmos Image Sensor ◽  
Image Sensor ◽  
Back Side

A high-dynamic range (HDR) back-side illuminated (BSI) CMOS image sensor for extreme UV detection

2012 ◽  
Author(s):  
Xinyang Wang ◽  
Bram Wolfs ◽  
Jan Bogaerts ◽  
Guy Meynants ◽  
Ali BenMoussa
Keyword(s):  
Dynamic Range ◽  
High Dynamic Range ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Uv Detection ◽  
Back Side ◽  
Extreme Uv ◽  
High Dynamic

Development of Wafer Level Chip Size Packaging Process and its Application to the CMOS Image Sensor Module for Medical Device

2017 ◽  
Vol 137 (2) ◽  
pp. 48-58
Author(s):  
Noriyuki Fujimori ◽  
Takatoshi Igarashi ◽  
Takahiro Shimohata ◽  
Takuro Suyama ◽  
Kazuhiro Yoshida ◽  
...  
Keyword(s):  
Medical Device ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Wafer Level ◽  
Packaging Process ◽  
Sensor Module ◽  
Chip Size
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