Highly sensitive analytical method for metallic impurities in the thin silicon layer of silicon-on-insulator wafer

1997 ◽  
Vol 15 (1) ◽  
pp. 171
Author(s):  
J. Kodate
Keyword(s):  
Analytical Method ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Highly Sensitive ◽  
Thin Silicon ◽  
Metallic Impurities

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

Properties of extremely thin silicon layer in silicon-on-insulator structure formed by smart-cut technology

2000 ◽  
Vol 73 (1-3) ◽  
pp. 82-86 ◽  
Author(s):  
V.P Popov ◽  
I.V Antonova ◽  
V.F Stas ◽  
L.V Mironova ◽  
A.K Gutakovskii ◽  
...  
Keyword(s):  
Silicon Layer ◽  
Silicon On Insulator ◽  
Thin Silicon

Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

1985 ◽  
Vol 43 ◽  
pp. 300-301
Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love
Keyword(s):  
Ion Implantation ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Dose ◽  
Crystal Silicon ◽  
Oxygen Ion ◽  
Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

scholarly journals Highly Sensitive and Selective Sodium Ion Sensor Based on Silicon Nanowire Dual Gate Field-Effect Transistor

Sensors ◽  
2021 ◽  
Vol 21 (12) ◽  
pp. 4213
Author(s):  
Seong-Kun Cho ◽  
Won-Ju Cho
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Silicon Nanowire ◽  
Silicon On Insulator ◽  
Sodium Ion ◽  
Ion Sensor ◽  
Highly Sensitive ◽  
Selective Membrane ◽  
Dual Gate ◽  
Effect Transistor

In this study, a highly sensitive and selective sodium ion sensor consisting of a dual-gate (DG) structured silicon nanowire (SiNW) field-effect transistor (FET) as the transducer and a sodium-selective membrane extended gate (EG) as the sensing unit was developed. The SiNW channel DG FET was fabricated through the dry etching of the silicon-on-insulator substrate by using electrospun polyvinylpyrrolidone nanofibers as a template for the SiNW pattern transfer. The selectivity and sensitivity of sodium to other ions were verified by constructing a sodium ion sensor, wherein the EG was electrically connected to the SiNW channel DG FET with a sodium-selective membrane. An extremely high sensitivity of 1464.66 mV/dec was obtained for a NaCl solution. The low sensitivities of the SiNW channel FET-based sodium ion sensor to CaCl2, KCl, and pH buffer solutions demonstrated its excellent selectivity. The reliability and stability of the sodium ion sensor were verified under non-ideal behaviors by analyzing the hysteresis and drift. Therefore, the SiNW channel DG FET-based sodium ion sensor, which comprises a sodium-selective membrane EG, can be applied to accurately detect sodium ions in the analyses of sweat or blood.

scholarly journals A Flexible PI/Si/SiO2 Piezoresistive Microcantilever for Trace-Level Detection of Aflatoxin B1

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1118
Author(s):  
Yuan Tian ◽  
Yi Liu ◽  
Yang Wang ◽  
Jia Xu ◽  
Xiaomei Yu
Keyword(s):  
Single Crystal ◽  
Aflatoxin B1 ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Wheatstone Bridge ◽  
Silicon On Insulator ◽  
Passivation Layer ◽  
Spring Constant ◽  
Trace Level ◽  
Crystal Silicon

In this paper, a polyimide (PI)/Si/SiO2-based piezoresistive microcantilever biosensor was developed to achieve a trace level detection for aflatoxin B1. To take advantage of both the high piezoresistance coefficient of single-crystal silicon and the small spring constant of PI, the flexible piezoresistive microcantilever was designed using the buried oxide (BOX) layer of a silicon-on-insulator (SOI) wafer as a bottom passivation layer, the topmost single-crystal silicon layer as a piezoresistor layer, and a thin PI film as a top passivation layer. To obtain higher sensitivity and output voltage stability, four identical piezoresistors, two of which were located in the substrate and two integrated in the microcantilevers, were composed of a quarter-bridge configuration wheatstone bridge. The fabricated PI/Si/SiO2 microcantilever showed good mechanical properties with a spring constant of 21.31 nN/μm and a deflection sensitivity of 3.54 × 10−7 nm−1. The microcantilever biosensor also showed a stable voltage output in the Phosphate Buffered Saline (PBS) buffer with a fluctuation less than 1 μV @ 3 V. By functionalizing anti-aflatoxin B1 on the sensing piezoresistive microcantilever with a biotin avidin system (BAS), a linear aflatoxin B1 detection concentration resulting from 1 ng/mL to 100 ng/mL was obtained, and the toxic molecule detection also showed good specificity. The experimental results indicate that the PI/Si/SiO2 flexible piezoresistive microcantilever biosensor has excellent abilities in trace-level and specific detections of aflatoxin B1 and other biomolecules.

Formation technology of flat surface with epitaxial growth on ion-implanted (100)-oriented Si surface of thin silicon-on-insulator

2017 ◽  
Vol 56 (10) ◽  
pp. 105503
Author(s):  
Kiichi Furukawa ◽  
Akinobu Teramoto ◽  
Rihito Kuroda ◽  
Tomoyuki Suwa ◽  
Keiichi Hashimoto ◽  
...  
Keyword(s):  
Epitaxial Growth ◽  
Flat Surface ◽  
Silicon On Insulator ◽  
Thin Silicon ◽  
Ion Implanted

LOW-NOISE SILICON-ON-INSULATOR HALL DEVICES

2004 ◽  
Vol 04 (02) ◽  
pp. L345-L354 ◽  
Author(s):  
Y. HADDAB ◽  
V. MOSSER ◽  
M. LYSOWEC ◽  
J. SUSKI ◽  
L. DEMEUS ◽  
...  
Keyword(s):  
Noise Level ◽  
Low Voltage ◽  
Silicon Layer ◽  
Electrical Current ◽  
Low Noise ◽  
Silicon On Insulator ◽  
Technological Parameters ◽  
Wide Range ◽  
Hall Sensors ◽  
Soi Technology

Hall sensors are used in a very wide range of applications. A very demanding one is electrical current measurement for metering purposes. In addition to high precision and stability, a sufficiently low noise level is required. Cost reduction through sensor integration with low-voltage/low-power electronics is also desirable. The purpose of this work is to investigate the possible use of SOI (Silicon On Insulator) technology for this integration. We have fabricated SOI Hall devices exploring the useful range of silicon layer thickness and doping level. We show that noise is influenced by the presence of LOCOS and p-n depletion zones near the edges of the active zones of the devices. A proper choice of SOI technological parameters and process flow leads to up to 18 dB reduction in Hall sensor noise level. This result can be extended to many categories of devices fabricated using SOI technology.

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