Influence of vacuum environment on conductive atomic force microscopy measurements of advanced metal-oxide-semiconductor gate dielectrics

2008 ◽  
Vol 26 (4) ◽  
pp. 1445 ◽  
Author(s):  
L. Aguilera ◽  
W. Polspoel ◽  
A. Volodin ◽  
C. Van Haesendonck ◽  
M. Porti ◽  
...  
Keyword(s):  
Atomic Force Microscopy ◽  
Metal Oxide ◽  
Gate Dielectrics ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Conductive Atomic Force Microscopy ◽  
Force Microscopy ◽  
Atomic Force

Direct Observation of Dielectric Breakdown Spot in Thermal Oxides on 4H-SiC(0001) Using Conductive Atomic Force Microscopy

2010 ◽  
Vol 645-648 ◽  
pp. 821-824 ◽  
Author(s):  
Kohei Kozono ◽  
Takuji Hosoi ◽  
Yusuke Kagei ◽  
Takashi Kirino ◽  
Shuhei Mitani ◽  
...  
Keyword(s):  
Atomic Force Microscopy ◽  
Dielectric Breakdown ◽  
Oxide Semiconductor ◽  
Conductive Atomic Force Microscopy ◽  
Mos Capacitors ◽  
Step Bunching ◽  
Force Microscopy ◽  
Line Scan ◽  
Mos Devices ◽  
Atomic Force

The dielectric breakdown mechanism in 4H-SiC metal-oxide-semiconductor (MOS) devices was studied using conductive atomic force microscopy (C-AFM). We performed time-dependent dielectric breakdown (TDDB) measurements using a line scan mode of C-AFM, which can characterize nanoscale degradation of dielectrics. It was found that the Weibull slope () of time-to-breakdown (tBD) statistics in 7-nm-thick thermal oxides on SiC substrates was much larger for the C-AFM line scan than for the common constant voltage stress TDDB tests on MOS capacitors, suggesting the presence of some weak spots in the oxides. Superposition of simultaneously obtained C-AFM topographic and current map images of SiO2/SiC structure clearly demonstrated that most of breakdown spots were located at step bunching. These results indicate that preferential breakdown at step bunching due to local electric field concentration is the probable cause of poor gate oxide reliability of 4H-SiC MOS devices.

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